STM1068C40F38F

STM1068 Smart voltage supervisor Features ■ ■ ■ ■ ■ ■ ■ ■ ■ Operating voltage 2.7 V to 5.5 V Supply current of 1.5 µA (typ) Factory-trimmed voltage threshold from 3.2 V to 3.5 V in 50 mV increments 3% voltage threshold accuracy across temperature Enable and inhibit inputs (EN, INH) Power supply transient immunity Current limited output of 15 mA (max) Available in flip chip 8-bump package Operating temperature –30°C to +85°C Flip chip (8-bump) Applications ■ ■ ■ ■ ■ ■ ■ Portable devices Cell phones/smart phones PDA Palmtops Organizers Portable audio/video players Portable terminals May 2008 Rev 6 1/22 www.st.com 1 Contents STM1068 Contents 1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 2.2 2.3 2.4 Output, OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Enable input, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Inhibit input, INH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pass gate, PKX and POX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 4 5 6 7 8 9 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 STM1068 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Truth table for output, OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Truth table for pass gate between PKX and POX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Flip chip 8-bump, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Factory-trimmed thresholds with marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3/22 List of figures STM1068 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8-bump flip chip connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Supply current vs. supply voltage, VEN = 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Supply current vs. temperature, VEN = 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Supply current vs. supply voltage, VEN = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Supply current vs. temperature, VEN = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Rising voltage detector threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Threshold hysteresis vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Flip chip 8-bump, package mechanical outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Flip chip tape and reel specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4/22 STM1068 Description 1 Description STM1068 device monitors supply voltage VCC and the state of EN and INH inputs. Depending on logical combination of these inputs, the output OUT is connected to VIN or GND and the pass gate between PKX and POX is either enabled or disabled (see Table 2 and Table 3 for more details). The device offers several voltage thresholds, VTH+ (see Table 9) and it is available in miniature flip chip 8-bump package. Figure 1. Logic diagram VCC VIN EN OUT INH PKX STM1068 POX GND ai13958 5/22 Description STM1068 Table 1. Pin descriptions Pin 1A 1B 1C 1D 2A 2B 2C 2D Symbol VIN EN GND PKX OUT INH VCC POX Function Supply for output pin (OUT) Enable from USB VBUS Ground Pass gate input Output Inhibit input Supply voltage Pass gate output Figure 2. 8-bump flip chip connections A 1 VIN B EN C GND D PKX A 2 OUT B IN H C VCC D POX 2 OUT IN H VCC POX 1 VIN EN GND PKX bottom view, bumps up top view, bumps down ai13959 6/22 STM1068 Figure 3. Block diagram VIN VCC Description Current source GND Bandgap + - Level shifter LOGIC EN Delay 2µs VCC OUT POX 8kV ESD Protection INH PKX ai13960 Figure 4. Hardware hookup USB charging and transceiver circuits VBAT DC-DC step-up converter VCC EN OUT GND VBUS USB connector R1 R2 C3 VBOOST VBAT C1 EN Inhibit control VCC VIN ASIC VOUT STM1068 POX INH GND PKX C2 Power key VCHARGER Power key ai13961 7/22 Operation STM1068 2 Operation The STM1068 device monitors supply voltage VCC and logic states of EN and INH inputs. According to detected states is the output OUT connected to VIN or GND and the pass gate between PKX and POX is either enabled or disabled (see Table 2, Table 3 , and Figure 11 for more details). 2.1 Output, OUT If the enable input is in a logic high state and inhibit input is in a logic low state, the output will be connected to VIN input as VCC rises above the VTH+ voltage threshold. Otherwise, the output is connected to ground GND. The output is current limited (see Table 6). 2.2 Enable input, EN A logic low on the enable input disconnects the output, OUT, from VIN, the POX will follow the PKX and the device enters a standby mode with very low current consumption (see Table 6). 2.3 Inhibit input, INH A logic high on the inhibit input disconnects the output, OUT, from VIN and the POX will follow the PKX. 2.4 Pass gate, PKX and POX Pass gate between PKX and POX is disabled only if enable input is in logic high, inhibit input is in logic low and the supply voltage is below the voltage threshold. Table 2. EN(1) L x x H Truth table for output, OUT INH x H x L VCC x x VTH- (falling edge) OUT connected to GND connected to GND connected to GND connected to VIN 1. Once the device is disabled by EN input, the VCC must be above VTH+ to reconnect output to VIN. 8/22 STM1068 Operation Table 3. Truth table for pass gate between PKX and POX EN L x x H INH x H x L VCC x x >VTH+ (rising edge) >VTH- (falling edge)