STP7NB40

STP7NB40 STP7NB40FP N - CHANNEL ENHANCEMENT MODE PowerMESH™ MOSFET PRELIMINARY DATA TYPE STP7NB40 STP7NB40FP s s s s s V DSS 400 V 400 V R DS(on) < 0.9 Ω < 0.9 Ω ID 7.0 A 4.4 A TYPICAL RDS(on) = 0.75 Ω EXTREMELY HIGH dV/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 1 2 3 1 2 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, SGS-Thomson has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s SWITCH MODE POWER SUPPLIES (SMPS) s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE s TO-220 TO-220FP INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID IDM ( • ) P tot dv/dt( 1 ) V ISO T stg Tj Parameter Drain-source Voltage (V GS = 0 ) Drain- gate Voltage (R GS = 2 0 k Ω ) Gate-source Voltage Drain Current (continuous) at T c = 2 5 C Drain Current (continuous) at T c = 1 00 o C Drain Current (pulsed) Total Dissipation at T c = 2 5 o C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature o Value STP7NB40 STP7NB40FP 400 400 ± 30 7 4.4 28 100 0.8 4.5  -65 to 150 150 4.4 2.8 28 35 0.28 4.5 2000 Unit V V V A A A W W/ o C V/ns V o o C C (•) Pulse width limited by safe operating area (1) ISD ≤ 7A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. January 1998 1/4 STP7NB40/FP THERMAL DATA TO-220 R thj-case R thj-amb R thc-sink Tl Thermal Resistance Junction-case Max 1.25 62.5 0.5 300 TO-220FP 3.57 o o o C/W C/W C/W o C Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symbol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j m ax, δ < 1 %) Single Pulse Avalanche Energy (starting T j = 2 5 o C, I D = I AR , VDD = 5 0 V) Max Value 7 300 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BR)DSS I DSS I GSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 2 50 µ A VGS = 0 Min. 400 1 50 ± 1 00 Typ. Max. Unit V µA µA nA Zero Gate Voltage V DS = M ax Rating Drain Current (V GS = 0 ) V DS = M ax Rating Gate-body Leakage Current (V DS = 0 ) V GS = ± 3 0 V T c = 1 25 o C ON (∗) Symbol V GS(th) R DS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance V DS = VGS V GS = 1 0V Test Conditions ID = 2 50 µ A I D = 3 .5 A 7 Min. 3 Typ. 4 0.75 Max. 5 0.9 Unit V Ω A On State Drain Current V DS > I D(on) x R DS(on)max V GS = 1 0 V DYNAMIC Symbol g fs ( ∗ ) C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions V DS > I D(on) x R DS(on)max V DS = 2 5 V f = 1 MHz I D = 3 .5 A V GS = 0 Min. 2.5 Typ. 4.2 705 132 17 720 175 25 Max. Unit S pF pF pF 2/4 STP7NB40/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions V DD = 2 00 V I D = 3 .5 A R G = 4 .7 Ω V GS = 1 0 V (see test circuit, figure 3) V DD = 3 20 V ID = 7 A VGS = 1 0 V Min. Typ. 11.5 7.5 21 7.3 8.5 Max. 16 11 30 Unit ns ns nC nC nC SWITCHING OFF Symbol t r(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions V DD = 3 20 V I D = 7 A R G = 4 .7 Ω V GS = 1 0 V (see test circuit, figure 5) Min. Typ. 9.5 9 16.5 Max. 15 14 25 Unit ns ns ns SOURCE DRAIN DIODE Symbol I SD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 7 A V GS = 0 300 2 13.7 I SD = 7 A d i/dt = 100 A/ µ s o V DD = 1 00 V T j = 1 50 C (see test circuit, figure 5) Test Conditions Min. Typ. Max. 7 28 1.6 Unit A A V ns µC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/4 STP7NB40/FP Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. © 1998 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A ... 4/4