VN750SMTR-E

VN750SM-E HIGH SIDE DRIVER Table 1. General Features Type VN750SM-E Figure 1. Package RDS(on) IOUT VCC 55 mΩ 6A 36 V CMOS COMPATIBLE INPUT ■ ON STATE OPEN LOAD DETECTION ■ OFF STATE OPEN LOAD DETECTION ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ PROTECTION AGAINST LOSS OF GROUND ■ VERY LOW STAND-BY CURRENT ■ REVERSE BATTERY PROTECTION (*) ■ IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE ■ SO-8 c u d e t le o r P Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both in on and off state. The openload threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. o s b O - DESCRIPTION The VN750SM-E is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). ) s ( ct ) s t( u d o r P e t e l o s b O Table 2. Order Codes Package SO-8 Tube VN750SM-E Tape and Reel VN750SMTR-E Note: (*) See application schematic at page 9. Rev. 1 October 2004 1/20 VN750SM-E Figure 2. Block Diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT OUTPUT LOGIC CURRENT LIMITER ON STATE OPENLOAD DETECTION STATUS OVERTEMPERATURE DETECTION e t le Table 3. Absolute Maximum Ratings Symbol VCC - VCC - Ignd IOUT - IOUT IIN ISTAT Parameter VESD ) s ( ct t e l o bs O 2/20 Ptot Tj Tstg u d o r P e - STATUS - OUTPUT EMAX o s b O - DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) - INPUT c u d OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION - VCC Maximum Switching Energy (L=1.3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=10A) Power Dissipation TC=25°C Junction Operating Temperature Storage Temperature ) s t( o r P Value 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 Unit V V mA A A mA mA 4000 V 4000 V 5000 V 5000 V 90 mJ 4.2 Internally Limited - 55 to 150 W °C °C VN750SM-E Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins VCC OUTPUT OUTPUT VCC Connection / Pin Status Floating X To Ground 5 4 8 N.C. X X 1 N.C. STATUS INPUT GND Output X Input X Through 10KΩ resistor c u d Figure 4. Current and Voltage Conventions o r P IS VF IIN e t le VCC INPUT so ISTAT STATUS VIN (s) VSTAT IOUT b O - VCC OUTPUT GND ) s t( VOUT IGND t c u d o r P e Table 4. Thermal Data t e l o Symbol Rthj-lead bs Rthj-amb Parameter Thermal Resistance Junction-lead Thermal Resistance Junction-ambient Value Max Max Unit 30 93 (1) °C/W 82(2) °C/W O (1) When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. (2) When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 3/20 VN750SM-E ELECTRICAL CHARACTERISTICS (8V TTSD) L Overtemperature L H L L Undervoltage L H L L Overvoltage L H Output Voltage > VOL L H Output Current < IOL L H c u d (t s) c u d e t le o r P H L X X so b O - L L H H H H L H L H H L Figure 6. Switching time Waveforms o r P e VOUTn t e l o s b O 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VINn td(on) td(off) t 6/20 ) s t( VN750SM-E Table 13. Electrical Transient Requirements On VCC Pin TEST LEVELS ISO T/R 7637/1 Test Pulse I II III IV 1 2 3a 3b 4 5 -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω I TEST LEVELS RESULTS II III IV C C C C C C C C C C C E C C C C C E C C C C C E c u d ) s t( CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. e t le ) s ( ct o r P o s b O - u d o r P e t e l o s b O 7/20 VN750SM-E Figure 7. Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined c u d OVERVOLTAGE VCCVOV VCC INPUT LOAD VOLTAGE STATUS e t le o s b O - OPEN LOAD with external pull-up INPUT ) s ( ct LOAD VOLTAGE VOUT>VOL VOL STATUS u d o OPEN LOAD without external pull-up r P e INPUT LOAD VOLTAGE t e l o STATUS s b O Tj INPUT LOAD CURRENT STATUS 8/20 TTSD TR OVERTEMPERATURE o r P ) s t( VN750SM-E Figure 8. Application Schematic +5V +5V VCC Rprot STATUS Dld µC Rprot INPUT OUTPUT GND RGND VGND DGND c u d GND PROTECTION REVERSE BATTERY NETWORK AGAINST o r P e s b O t e l o c u d o r P the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. e t le o s b O - Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / (IS(on)max). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC