VNI4140KTR-32

VNI4140K, VNI4140K-32 Datasheet Quad high-side smart power solid-state relay Features • • • • • • • • • Operating output current: 0.6 A (VNI4140K) or 1.0 A (VNI4140K-32) per channel Per channel short-circuit protection Per channel overtemperature protection Thermal case protection Not simultaneous channel reactivation at Thermal case reset All type of loads (resistive, capacitive, inductive load) are driven Loss of GND protection Undervoltage shutdown with hysteresis Overvoltage protection (VCC clamping) • • • • • • Very low supply current Per channel open drain thermal fault pins 5 V and 3.3 V compatible I/Os Fast demagnetization of inductive loads Designed to meet IEC61131-2, IEC61000-4-4, and IEC61000-4-5 ESD according to IEC 61000-4-2 up to ±25 kV Applications Product status VNI4140K VNI4140K-32 Product label • • • Programmable logic control Industrial PC peripheral input/output Numerical control machines Description The VNI414K (for loads up to 0.6 A) and VNI4140K-32 (for loads up to 1.0 A) are monolithic 4-channel drivers featuring very low RDS(on) and per-channel diagnostic. The ICs, realized in STMicroelectronics™ VIPower™ technology, are intended to drive any kind of load with one side connected to ground. Active channel current limitation combined with thermal shutdown, independent for each channel, and automatic restart, protect the device against overload. A channel in an overload condition overheats and turns OFF and back ON automatically in order to maintain its junction temperature between TTSD and TR. If this condition makes case temperature reach TCSD, the overloaded channel is turned OFF and restarts only when case temperature has decreased down to TCR. In case of more than one channel in overload, restart of the overloaded channels is not simultaneous, in order to avoid high peak current from the supply. Non-overloaded (non-overheated) channels continue operating normally. The four open drain STATUSX output pins indicate per-channel overtemperature conditions. DS13837 - Rev 1 - October 2021 For further information contact your local STMicroelectronics sales office. www.st.com VNI4140K, VNI4140K-32 Block diagram 1 Block diagram Figure 1. Block diagram DS13837 - Rev 1 page 2/29 VNI4140K, VNI4140K-32 Pin connection 2 Pin connection Figure 2. Pin connection (top view) Table 1. Pin description Pin DS13837 - Rev 1 Name Type Description 1, TAB VCC Supply IC supply voltage. 2 IN1 Logic input Channel 1 input, 3.3 V CMOS/TTL compatible. 3 STAT1 Output/Open Drain Channel 1 overtemperature status (active low). 4 IN2 Logic input Channel 2 input, 3.3 V CMOS/TTL compatible. 5 STAT2 Output/Open Drain Channel 2 overtemperature status (active low). 6 GND Ground Device ground connection. 7 STAT3 Output/Open Drain Channel 3 overtemperature status (active low). 8 IN3 Logic input Channel 3 input, 3.3 V CMOS/TTL compatible. 9 STAT4 Output/Open Drain Channel 4 overtemperature status (active low). 10 IN4 Logic input Channel 4 input, 3.3 V CMOS/TTL compatible. 11, 12 NC - Not connected. 13, 14, 15 OUT4 Output Channel 4 power stage output, internally protected. 16, 17, 18 OUT3 Output Channel 3 power stage output, internally protected. 19, 20, 21 OUT2 Output Channel 2 power stage output, internally protected. 22, 23, 24 OUT1 Output Channel 1 power stage output, internally protected. page 3/29 VNI4140K, VNI4140K-32 Maximum ratings 3 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter VCC Power supply voltage IGND DC ground reverse current Value Unit -0.3 to 41 V -250 IOUT DC output current IR DC reverse output current (per channel) IIN Internally limited mA (1) A -5 A Input pin current (per channel) +/-10 mA VIN Input pin voltage +VCC V VSTAT Status pin voltage +VCC V ISTAT Status pin current (per pin) +/-10 mA VESD Electrostatic discharge (R = 1.5k Ω; C = 100 pF) 2000 V EAS Single channel/single pulse avalanche energy @Tamb = 125 °C, IOUT = 0.5 A 5 J PTOT Power dissipation at TC = 25 °C Internally limited (1) W TJ Junction operating temperature Internally limited (1) °C TSTG Storage temperature -55 to 150 °C 1. Protection functions are intended to avoid IC damage in fault conditions and are not intended for continuous operation. Continuous and repetitive operation of protection functions may reduce the IC lifetime. Table 3. Thermal data Symbol Rth(JC) Rth(JA) Parameter Thermal resistance junction-case (1) Thermal resistance junction-ambient Value Unit 2 °C/W See Figure 13. RTH(JA) vs. PCB copper area in open box free air condition (one channel ON) °C/W 1. per channel DS13837 - Rev 1 page 4/29 VNI4140K, VNI4140K-32 Recommended operating 4 conditions Recommended operating conditions Table 4. Input switching limits Symbol FVIN(MAX) DS13837 - Rev 1 Parameter Maximum input switching frequency Value Unit 10 kHz page 5/29 VNI4140K, VNI4140K-32 Electrical characteristics 5 Electrical characteristics 10.5 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified 5.1 Power section Table 5. Power section Symbol VCC RDS(on) Parameter Test conditions Supply voltage ON-state resistance Min. 10.5 VCC supply current V 0.14 VNI4140K-32, IOUT = 0.7 A at TJ = 25 °C 0.08 VNI4140K-32, IOUT = 0.7 A 0.14 0.25 All channels in ON-state, Clamp on VCC IS = 20 mA VOUT(OFF) OFF-state output voltage VIN = 0 V, IOUT = 0 A IOUT(OFF) OFF-state output current VIN = VOUT = 0 V 41 mA 4 mA 45 52 V 1 V 5 μA 1.0 mA 0.5 mA 0 VCC = VIN = VSTAT = VGND = 24 V; V OUT = 0 V VNI4140K-32 output current at GND disconnection Channel in ON-state (1) Ω 2.4 VNI4140K output current at GND disconnection Charge pump frequency 36 VNI4140K, IOUT = 0.5 A VCC clamp FCP Unit 0.08 with VIN1..4 = 5 V ILGND Max. VNI4140K, IOUT = 0.5 A at TJ = 25 °C All channels in OFF-state IS Typ. 1.45 MHz 1. To cover EN55022 class A and class B normative. 5.2 Switching Table 6. Switching Symbol DS13837 - Rev 1 Parameter Test conditions Min. Typ. Max. Unit tPD(L-H) Turn-on delay time - 16 35 µs tr Rise time - 8 25 µs tPD(H-L) Turn-off delay time - 21 36 µs tf Fall time - 4 12 µs dV(ON)/dtr Turn-on voltage slope - 2 - V/µs dV(OFF)/dtf Turn-off voltage slope - 4 - V/µs VCC = 24 V, RL = 48 Ω, input rise time < 0.1 µs. See Figure 4. Timing in normal operation page 6/29 VNI4140K, VNI4140K-32 Logic inputs Figure 3. Timing in normal operation 5.3 Logic inputs Table 7. Logic inputs Symbol DS13837 - Rev 1 Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) Input hysteresis voltage IIN Input current Test conditions Min. Typ. Max. Unit 0.8 V 2.20 V 0.15 V VIN = 15 V 10 VIN = 36 V 210 µA page 7/29 VNI4140K, VNI4140K-32 Protection and diagnostic 5.4 Protection and diagnostic Table 8. Protection and diagnostic Symbol Test conditions Min. VSTAT Status voltage output low VUSD Undervoltage protection 7 VUSDHYS Undervoltage hysteresis 0.4 IPEAK ILIM 5.5 Parameter VNI4140K maximum DC output current VNI4140K-32 maximum DC output current VNI4140K, DC short-circuit current VNI4140K-32, DC shortcircuit current Typ. ISTAT = 1.6 mA Max. Unit 0.6 V 10.5 V 0.5 V 1.3 Dynamic load A 1.6 0.7 1.0 1.7 VCC = 24 V, RLOAD = < 10 mΩ A 1.1 VCC = VSTAT = 36 V 1.5 ILSTAT Status leakage current TTSD Junction shutdown temperature 150 TR Junction reset temperature 135 THIST Junction thermal hysteresis 7 15 TCSD Case shutdown temperature 125 130 TCR Case reset temperature 110 TCHYST Case thermal hysteresis 7 15 VDEMAG Output voltage at turn-OFF VCC - 41 VCC - 45 IOUT = 0.5 A; LLOAD ≥ 1 mH 2.6 30 170 μA 190 °C °C °C 135 °C °C °C VCC - 52 V Current and voltage conventions Figure 4. Current and voltage conventions DS13837 - Rev 1 page 8/29 VNI4140K, VNI4140K-32 Truth table 6 Truth table Table 9. Truth table InputN OutputN StatusN L L H H H H L L H H L L L L X H L X Output overload L L H (current limitation before overtemperature) H X H Condition Normal operation Overtemperature Undervoltage Note: DS13837 - Rev 1 X = don't care page 9/29 VNI4140K, VNI4140K-32 Typical application 7 circuit Typical application circuit Figure 5. Typical application circuit DS13837 - Rev 1 page 10/29 VNI4140K, VNI4140K-32 Thermal management 8 Thermal management The power dissipation in the IC is the main factor that sets the safe operating condition of the device in the application. Therefore, it must be considered very carefully. Furthermore, the available space on the PCB should be chosen considering the power dissipation. Heat sinking can be achieved using copper on the PCB with proper area and thickness. Two different protections have been implemented to guarantee safety of the device if it overheats due to an overloaded condition or high environment temperature. The following flowchart explains in detail this protection functionality. Figure 6. Thermal behavior Vin(i) = H OUT(i) On STAT(i) Off (H) 1 NO YES Tj(i) > Ttsd OUT(i) Off STAT(i) On (L) YES Tc > Tcsd 2 NO 4 YES NO Tc > Tcr NO 3 Note: DS13837 - Rev 1 Tj(i) > Tjr YES GIPG030420151405LM 1 Thermal shutdown 2 Junction hysteresis 3 Restore to idle condition 4 Case hysteresis page 11/29 VNI4140K, VNI4140K-32 Switching waveforms 9 Switching waveforms Figure 7. Switching waveforms DS13837 - Rev 1 page 12/29 VNI4140K, VNI4140K-32 Pin function description 10 Pin function description Figure 8. Input circuit Figure 9. Status circuit DS13837 - Rev 1 page 13/29 VNI4140K, VNI4140K-32 Pin function description Figure 10. Charge pump switching frequency (typical) vs. temperature DS13837 - Rev 1 page 14/29 VNI4140K, VNI4140K-32 Package and PCB thermal 11 Package and PCB thermal data 11.1 Thermal data data Figure 11. PCB for thermal tests Layout condition of RTH and ZTH measurements (PCB: double layer, thermal vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 mm (front and back side), copper areas: from minimum pad layout to 8 cm2). Figure 12. RTH(JA) vs. PCB copper area in open box free air condition (one channel ON) DS13837 - Rev 1 page 15/29 VNI4140K, VNI4140K-32 Thermal data Figure 13. Thermal impedance junction-ambient single pulse (one channel ON) DS13837 - Rev 1 page 16/29 VNI4140K, VNI4140K-32 Reverse polarity protection 12 Reverse polarity protection Reverse polarity protection can be implemented on-board using two different solutions: 1. Placing a resistor (RGND) between IC GND pin and load GND 2. Placing a diode between IC GND pin and load GND If option 1 is selected, the minimum resistance value has to be selected according to the following equation: RGND ≥ VCC / IGND where IGND is the DC reverse ground pin current and can be found in Maximum ratings of this datasheet. Power dissipated by RGND (when VCC < 0: during reverse polarity situations) is: PD = (VCC)2/RGND If option 2 is selected, the diode has to be chosen by taking into account VRRM >|VCC| and its power dissipation capability: PD ≥ IS*VF Note: In normal conditions (no reverse polarity), due to the diode, there is a voltage drop between GND of the device and GND of the system. Figure 14. Reverse polarity protection +Vcc Intputi Outputi Statusi GND Load RGND Diode GIPG020420151344LM This schematic can be used with any type of load. DS13837 - Rev 1 page 17/29 VNI4140K, VNI4140K-32 Demagnetization energy 13 Demagnetization energy Figure 15. Maximum demagnetization energy vs. load current, typical values DS13837 - Rev 1 page 18/29 VNI4140K, VNI4140K-32 Package mechanical data 14 Package mechanical data Figure 16. PowerSSO-24 package dimensions [mm] Table 10. PowerSSO24, mechanical data Dim. [mm] Min. Max. A 2.15 A2 2.15 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 2.47 - e 0.8 e3 8.8 2.40 G 0.1 G1 0.06 H 10.1 h L 10.5 0.4 0.55 N DS13837 - Rev 1 Typ. 0.85 10deg X 4.1 4.7 Y 6.5 7.1 page 19/29 VNI4140K, VNI4140K-32 Package mechanical data Figure 17. PowerSSO24 suggested footprint [mm] STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the above figure is a suggestion which might not be in line with the customer PCB supplier design rules. DS13837 - Rev 1 page 20/29 VNI4140K, VNI4140K-32 PowerSSO24, packing information 15 PowerSSO24, packing information Figure 18. PowerSSO-24 tube shipment (no suffix) Table 11. PowerSSO24, tube shipment information Note: Description Value Base quantity 49 Bulk quantity 1225 Tube lenght (± 0.5) 532 A 3.5 B 13.8 C (± 0.1) 0.6 All dimensions are in mm. Figure 19. PowerSSO24, reel shipment DS13837 - Rev 1 page 21/29 VNI4140K, VNI4140K-32 PowerSSO24, packing information Table 12. PowerSSO24, reel information Description Note: Value Base quantity 1000 Bulk quantity 1000 A (max.) 330 B (min.) 1.5 C (± 0.2) 13 F 20.2 G (2 ± 0) 24.4 N (min.) 100 T (max.) 30.4 All dimensions are in mm. Figure 20. PowerSSO24, tape drawings Table 13. PowerSSO24, tape dimension DS13837 - Rev 1 Description Symbol Value Tape width W 24 Tape hole spacing P0 (± 0.1) 4 Component spacing P 12 page 22/29 VNI4140K, VNI4140K-32 PowerSSO24, packing information Description Symbol Value Hole diameter D (± 0.05) 1.55 Hole diameter D1 (min.) 1.5 Hole position F (± 0.1) 11.5 Compartment depth K (max.) 2.85 Hole spacing P1 (± 0.1) 2 Note: All dimensions are in mm. Note: According to the Electronic Industries Association (EIA) standard 481 rev. A, Feb 1986. DS13837 - Rev 1 page 23/29 VNI4140K, VNI4140K-32 Ordering information 16 Ordering information Table 14. Order codes Order code Package VNI4140K VNI4140KTR VNI4140K-32 VNI4140KTR-32 DS13837 - Rev 1 Package marking VNI4140K PowerSSO-24 VNI4140K-32 Packaging Tube Tape and reel Tube Tape and reel page 24/29 VNI4140K, VNI4140K-32 Revision history Table 15. Document revision history DS13837 - Rev 1 Date Version 05-Oct-2021 1 Changes Initial release. page 25/29 VNI4140K, VNI4140K-32 Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 4 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.1 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.2 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5.3 Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5.4 Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.5 Current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 7 Typical application circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 8 Thermal management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 9 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 10 Pin function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 11 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 11.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 12 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 13 Demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 14 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 15 PowerSSO24, packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 16 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 DS13837 - Rev 1 page 26/29 VNI4140K, VNI4140K-32 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Pin description . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . Thermal data. . . . . . . . . . . . . . . . . . . . Input switching limits . . . . . . . . . . . . . . Power section . . . . . . . . . . . . . . . . . . . Switching . . . . . . . . . . . . . . . . . . . . . . Logic inputs. . . . . . . . . . . . . . . . . . . . . Protection and diagnostic . . . . . . . . . . . Truth table . . . . . . . . . . . . . . . . . . . . . PowerSSO24, mechanical data . . . . . . . PowerSSO24, tube shipment information PowerSSO24, reel information. . . . . . . . PowerSSO24, tape dimension . . . . . . . Order codes . . . . . . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . DS13837 - Rev 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 4 . 4 . 5 . 6 . 6 . 7 . 8 . 9 19 21 22 22 24 25 page 27/29 VNI4140K, VNI4140K-32 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. DS13837 - Rev 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing in normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Switching waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Charge pump switching frequency (typical) vs. temperature . . . . . . . . . . . . . PCB for thermal tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RTH(JA) vs. PCB copper area in open box free air condition (one channel ON) Thermal impedance junction-ambient single pulse (one channel ON). . . . . . . Reverse polarity protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum demagnetization energy vs. load current, typical values. . . . . . . . . PowerSSO-24 package dimensions [mm] . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO24 suggested footprint [mm] . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO-24 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO24, reel shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO24, tape drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 7 . 8 10 11 12 13 13 14 15 15 16 17 18 19 20 21 21 22 page 28/29 VNI4140K, VNI4140K-32 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DS13837 - Rev 1 page 29/29