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ICM-20608-G

ICM-20608-G

  • 厂商:

    TDK(东电化)

  • 封装:

    LGA16_3X3MM

  • 描述:

    IMU ACCEL/GYRO I2C/SPI 16LGA

  • 数据手册
  • 价格&库存
ICM-20608-G 数据手册
ICM-20608-G ICM-20608-G Datasheet Revision 1.0 This document contains information on a pre-production product. InvenSense Inc. reserves the right to change specifications and information herein without notice. InvenSense Inc. 1745 Technology Drive, San Jose, CA 95110 U.S.A +1(408) 988–7339 www.invensense.com Document Number: DS-000081 Revision: 1.0 Release Date: 06/15/2015 ICM-20608-G TABLE OF CONTENTS TABLE OF CONTENTS....................................................................................................................................................... 2 Table Of FIGURES ............................................................................................................................................................ 4 Table Of TABLES .............................................................................................................................................................. 4 1. 2. 3. 4. General Description ............................................................................................................................................. 5 1.2 Purpose and Scope .................................................................................................................................... 5 1.3 Product Overview...................................................................................................................................... 5 1.4 Applications............................................................................................................................................... 5 Features ............................................................................................................................................................... 6 2.1 Gyroscope Features .................................................................................................................................. 6 2.2 Accelerometer Features ............................................................................................................................ 6 2.3 Additional features.................................................................................................................................... 6 Electrical Characteristics ...................................................................................................................................... 7 3.1 Gyroscope Specifications .......................................................................................................................... 7 3.2 Accelerometer Specifications.................................................................................................................... 8 3.3 Electrical Specifications ............................................................................................................................. 9 3.3.1 D.C. Electrical Characteristics .................................................................................................................... 9 3.3.2 Standard (Duty-Cycle) Mode Noise and Power Performance: ................................................................ 10 3.3.3 A.C. Electrical Characteristics .................................................................................................................. 11 3.3.4 Other Electrical Specifications ................................................................................................................ 13 3.4 I2C Timing characterization..................................................................................................................... 14 3.5 spi Timing characterization ..................................................................................................................... 15 3.6 Absolute Maximum Ratings .................................................................................................................... 16 Applications Information ................................................................................................................................... 17 4.1 Pin Out Diagram and Signal Description ................................................................................................. 17 4.2 Typical Operating Circuit ......................................................................................................................... 18 4.3. bill of materials for external components ............................................................................................... 19 4.4. Block Diagram ......................................................................................................................................... 19 4.5. Overview ................................................................................................................................................. 20 4.6. Three-Axis MEMS Gyroscope with 16-bit ADCs and Signal Conditioning ............................................... 20 4.7. Three-Axis MEMS Accelerometer with 16-bit ADCs and Signal Conditioning......................................... 20 4.8. I2C and SPI Serial Communications Interfaces ........................................................................................ 20 4.8.1 ICM-20608-G Solution Using I2C Interface ............................................................................................. 20 4.8.2 ICM-20608-G Solution Using SPI Interface .............................................................................................. 21 4.9 Self-Test................................................................................................................................................... 22 4.10 Clocking............................................................................................................................................... 22 4.11 Sensor Data Registers ......................................................................................................................... 22 4.12 FIFO ..................................................................................................................................................... 22 4.13 Interrupts ............................................................................................................................................ 22 Page 2 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 5 4.14 Digital-Output Temperature Sensor ................................................................................................... 22 4.15 Bias and LDOs ..................................................................................................................................... 23 4.16 Charge Pump ...................................................................................................................................... 23 4.17 Power Modes ...................................................................................................................................... 23 Programmable Interrupts .................................................................................................................................. 24 5.1 6 7 Wake-on-Motion Interrupt ..................................................................................................................... 24 Digital Interface ................................................................................................................................................. 25 6.1 I2C and SPI Serial Interfaces .................................................................................................................... 25 6.2 I2C Interface ............................................................................................................................................ 25 6.3 I2C Communications Protocol ................................................................................................................. 25 6.4 I C Terms ................................................................................................................................................. 27 6.5 SPI Interface ............................................................................................................................................ 28 2 Assembly ............................................................................................................................................................ 29 Orientation of Axes ............................................................................................................................................ 29 Package Dimensions .......................................................................................................................................... 30 8 Part Number Package Marking .......................................................................................................................... 32 9.Reference ................................................................................................................................................................... 33 Revision History ................................................................................................................................................. 34 Compliance Declaration Disclaimer ................................................................................................................... 35 Page 3 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G TABLE OF FIGURES Figure 1. I2C Bus Timing Diagram ............................................................................................................................................................ 14 Figure 2. SPI Bus Timing Diagram............................................................................................................................................................. 15 Figure 3. Pin out Diagram for ICM-20608-G 3.0x3.0x0.75mm LGA ......................................................................................................... 17 Figure 4. ICM-20608-G I2C Operation Application Schematic ................................................................................................................. 18 Figure 5. ICM-20608-G SPI Operation Application Schematic ................................................................................................................. 18 Figure 6. ICM-20608-G Block Diagram ..................................................................................................................................................... 19 2 Figure 7. ICM-20608-G Solution Using I C Interface ................................................................................................................................ 21 Figure 8. ICM-20608-G Solution Using SPI Interface ................................................................................................................................ 21 Figure 9. START and STOP Conditions ...................................................................................................................................................... 25 2 Figure 10. Acknowledge on the I C Bus ................................................................................................................................................... 26 2 Figure 11. Complete I C Data Transfer ..................................................................................................................................................... 26 Figure 12. Typical SPI Master/Slave Configuration .................................................................................................................................. 28 Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation .................................................................................................... 29 TABLE OF TABLES Table 1. Gyroscope Specifications ............................................................................................................................................................. 7 Table 2. Accelerometer Specifications ....................................................................................................................................................... 8 Table 3. D.C. Electrical Characteristics ....................................................................................................................................................... 9 Table 4. Gyroscope Noise and Current Consumption .............................................................................................................................. 10 Table 5. Accelerometer Noise and Current Consumption ....................................................................................................................... 10 Table 6. A.C. Electrical Characteristics ..................................................................................................................................................... 12 Table 7. Other Electrical Specifications .................................................................................................................................................... 13 2 Table 8. I C Timing Characteristics ........................................................................................................................................................... 14 Table 9. SPI Timing Characteristics (8MHz Operation) ............................................................................................................................ 15 Table 10. Absolute Maximum Ratings ..................................................................................................................................................... 16 Table 12. Bill of Materials ....................................................................................................................................................................... 19 Table 13. Power Modes for ICM-20608-G ............................................................................................................................................... 23 Table 14. Table of Interrupt Sources ........................................................................................................................................................ 24 Table 15. Serial Interface ......................................................................................................................................................................... 25 2 Table 16. I C Terms .................................................................................................................................................................................. 27 Page 4 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 1. GENERAL DESCRIPTION 1.2 PURPOSE AND SCOPE This document is a product specification, providing a description, specifications, and design related information on the ICM-20608G™ MotionTracking device. The device is housed in a small 3x3x0.75mm 16-pin LGA package. 1.3 PRODUCT OVERVIEW The ICM-20608-G is a 6-axis MotionTracking device that combines a 3-axis gyroscope, and a 3-axis accelerometer in a small 3x3x0.75mm (16-pin LGA) package. It also features a 512-byte FIFO that can lower the traffic on the serial bus interface, and reduce power consumption by allowing the system processor to burst read sensor data and then go into a low-power mode. ICM-20608-G, with its 6-axis integration, enables manufacturers to eliminate the costly and complex selection, qualification, and system level integration of discrete devices, guaranteeing optimal motion performance for consumers. The gyroscope has a programmable full-scale range of ±250, ±500, ±1000, and ±2000 degrees/sec. The accelerometer has a userprogrammable accelerometer full-scale range of ±2g, ±4g, ±8g, and ±16g. Factory-calibrated initial sensitivity of both sensors reduces production-line calibration requirements. Other industry-leading features include on-chip 16-bit ADCs, programmable digital filters, an embedded temperature sensor, and 2 programmable interrupts. The device features I C and SPI serial interfaces, a VDD operating range of 1.71 to 3.45V, and a separate 2 digital IO supply, VDDIO from 1.71V to 3.45V. Communication with all registers of the device is performed using either I C at 400kHz or SPI at 8MHz. By leveraging its patented and volume-proven CMOS-MEMS fabrication platform, which integrates MEMS wafers with companion CMOS electronics through wafer-level bonding, InvenSense has driven the package size down to a footprint and thickness of 3x3x0.75mm (16-pin LGA), to provide a very small yet high performance low cost package. The device provides high robustness by supporting 10,000g shock reliability. 1.4 APPLICATIONS      Mobile phones and tablets Handset and portable gaming Motion-based game controllers 3D remote controls for Internet connected DTVs and set top boxes, 3D mice Wearable sensors for health, fitness and sports Page 5 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 2. FEATURES 2.1 GYROSCOPE FEATURES The triple-axis MEMS gyroscope in the ICM-20608-G includes a wide range of features:  Digital-output X-, Y-, and Z-axis angular rate sensors (gyroscopes) with a user-programmable full-scale range of ±250, ±500, ±1000, and ±2000°/sec and integrated 16-bit ADCs  Digitally-programmable low-pass filter  Factory calibrated sensitivity scale factor  Self-test 2.2 ACCELEROMETER FEATURES The triple-axis MEMS accelerometer in ICM-20608-G includes a wide range of features:  Digital-output X-, Y-, and Z-axis accelerometer with a programmable full scale range of ±2g, ±4g, ±8g and ±16g and integrated 16-bit ADCs  User-programmable interrupts  Wake-on-motion interrupt for low power operation of applications processor  Self-test 2.3 ADDITIONAL FEATURES The ICM-20608-G includes the following additional features:  Smallest and thinnest LGA package for portable devices: 3x3x0.75mm (16-pin LGA)  Minimal cross-axis sensitivity between the accelerometer and gyroscope axes  512 byte FIFO buffer enables the applications processor to read the data in bursts  Digital-output temperature sensor  User-programmable digital filters for gyroscope, accelerometer, and temp sensor  10,000 g shock tolerant 2  400kHz Fast Mode I C for communicating with all registers  8MHz SPI serial interface for communicating with all registers  MEMS structure hermetically sealed and bonded at wafer level  RoHS and Green compliant Page 6 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 3. ELECTRICAL CHARACTERISTICS 3.1 GYROSCOPE SPECIFICATIONS Typical Operating Circuit of section 0, VDD = 1.8 V, VDDIO = 1.8 V, TA = 25°C, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS NOTES GYROSCOPE SENSITIVITY Full-Scale Range FS_SEL=0 ±250 /s 3 FS_SEL=1 ±500 /s 3 FS_SEL=2 ±1000 /s 3 FS_SEL=3 ±2000 /s 3 16 bits 3 FS_SEL=0 131 LSB/(/s) 3 FS_SEL=1 65.5 LSB/(/s) 3 FS_SEL=2 32.8 LSB/(/s) 3 FS_SEL=3 16.4 LSB/(/s) 3 Gyroscope ADC Word Length Sensitivity Scale Factor Sensitivity Scale Factor Tolerance 25°C ±2 % 2 Sensitivity Scale Factor Variation Over Temperature -40°C to +85°C ±3 % 1 Nonlinearity Best fit straight line; 25°C ±0.1 % 1 ±2 % 1 ±5 /s 2 ±0.1 /s/°C 1 Cross-Axis Sensitivity ZERO-RATE OUTPUT (ZRO) Initial ZRO Tolerance 25°C ZRO Variation Over Temperature -40°C to +85°C GYROSCOPE NOISE PERFORMANCE (FS_SEL=0) Noise Spectral Density Low Pass Filter Response Gyroscope Start-Up Time Output Data Rate 25 Programmable Range From Sleep mode Standard (duty-cycled) mode Low-Noise (active) mode 1 KHz 2 250 Hz ms Hz Hz 3 1 1 1 35 3.91 4 Notes: Derived from validation or characterization of parts, not guaranteed in production. Tested in production. Guaranteed by design. Page 7 of 35 Document Number: DS-000081 Revision: 1.0 27 5 Table 1. Gyroscope Specifications 1. 2. 3. /s/√Hz 29 0.008 Gyroscope Mechanical Frequencies 500 8000 ICM-20608-G 3.2 ACCELEROMETER SPECIFICATIONS Typical Operating Circuit of section 0, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS NOTES ACCELEROMETER SENSITIVITY Full-Scale Range ADC Word Length Sensitivity Scale Factor Initial Tolerance Sensitivity Change vs. Temperature Nonlinearity AFS_SEL=0 ±2 g 3 AFS_SEL=1 ±4 g 3 AFS_SEL=2 ±8 g 3 AFS_SEL=3 ±16 g 3 Output in two’s complement format 16 bits 3 AFS_SEL=0 16,384 LSB/g 3 AFS_SEL=1 8,192 LSB/g 3 AFS_SEL=2 4,096 LSB/g 3 AFS_SEL=3 2,048 LSB/g 3 ±2 % 2 ±0.016 %/C 1 ±0.5 % 1 ±2 % 1 ±60 mg 1 ±0.5 mg/°C 1 ±1 mg/°C 1 250 µg/√Hz 1 218 Hz 3 3 1 1 500 4000 mg/LSB ms ms Hz Hz Component-level -40°C to +85°C AFS_SEL=0 Component-level Best Fit Straight Line Cross-Axis Sensitivity ZERO-G OUTPUT Initial Tolerance Component-level, all axes Zero-G Level Change vs. Temperature -40°C to +85°C, Board-level X and Y axes Z axis NOISE PERFORMANCE Noise Spectral Density Low Pass Filter Response Programmable Range 5 Intelligence Function Increment Accelerometer Startup Time Output Data Rate From Sleep mode From Cold Start, 1ms VDD ramp Standard (duty-cycled) mode Low-Noise (active) mode 4 20 30 0.24 4 Table 2. Accelerometer Specifications Notes: 1. 2. 3. Derived from validation or characterization of parts, not guaranteed in production. Tested in production. Guaranteed by design. Page 8 of 35 Document Number: DS-000081 Revision: 1.0 1 ICM-20608-G 3.3 ELECTRICAL SPECIFICATIONS 3.3.1 D.C. Electrical Characteristics Typical Operating Circuit of section 0, VDD = 1.8 V, VDDIO = 1.8 V, TA=25°C, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS NOTES VDD 1.71 1.8 3.45 V 1 VDDIO 1.71 1.8 3.45 V 1 3 mA 1 3-axis Gyroscope 2.6 mA 1 3-axis Accelerometer, 4kHz ODR 390 µA 1 Accelerometer Standard Mode 100Hz ODR, 1x averaging 57 µA 1 Gyroscope Standard Mode 100Hz ODR, 1x averaging 1.6 mA 1 Gyroscope Standard Mode 10Hz ODR, 1x averaging 1.3 mA 1 6-Axis Standard Mode (Gyroscope Standard Mode; Accelerometer LowNoise Mode) 100Hz ODR, 1x averaging 1.9 mA 1 6 µA 1 °C 1 SUPPLY VOLTAGES SUPPLY CURRENTS Low-Noise Mode 6-axis Gyroscope + Accelerometer Full-Chip Sleep Mode TEMPERATURE RANGE Specified Temperature Range Performance parameters are not applicable beyond Specified Temperature Range -40 Table 3. D.C. Electrical Characteristics Notes: 1. Derived from validation or characterization of parts, not guaranteed in production. Page 9 of 35 Document Number: DS-000081 Revision: 1.0 +85 ICM-20608-G 3.3.2 Standard (Duty-Cycle) Mode Noise and Power Performance: The following tables contain Gyroscope and Accelerometer noise and current consumption values for standard (duty-cycle) mode, for various ODRs and averaging filter settings. Please refer to the ICM-20608-G Register Map for further information about the registers referenced in the tables below. FCHOICE_B G_AVGCFG Averages Ton (ms) Noise BW (Hz) Noise (dps) TYP based on 0.008º/s/Hz ODR SMPLRT_DIV (Hz) 255 3.9 99 10.0 64 15.4 32 30.3 19 50.0 9 100.0 7 125.0 4 200.0 3 250.0 2 333.3 1 500.0 0 0 1x 1.73 650.8 0 1 2x 2.23 407.1 0 2 4x 3.23 224.2 0 3 8x 5.23 117.4 0 4 16x 9.23 60.2 0 5 32x 17.23 30.6 0 6 64x 33.23 15.6 0 7 128x 65.23 8.0 0.20 0.16 0.12 0.09 0.06 0.04 0.03 0.02 Current Consumption (mA) TYP 1.3 1.3 1.3 1.3 1.4 1.4 1.5 1.8 1.3 1.3 1.4 1.4 1.5 1.6 1.9 2.5 1.4 1.4 1.4 1.5 1.6 1.8 2.2 N/A 1.4 1.4 1.5 1.6 1.8 2.2 N/A 1.5 1.5 1.6 1.8 2.1 2.8 1.6 1.7 1.9 2.2 3.0 N/A 1.7 1.8 2.0 2.5 N/A 1.9 2.1 2.5 N/A 2.1 2.3 2.7 2.3 2.6 N/A 2.9 N/A Table 4. Gyroscope Noise and Current Consumption ACCEL_FCHOICE_B 1 0 0 0 A_DLPF_CFG x 7 7 7 DEC2_CFG x 0 1 2 Averages 1x 4x 8x 16x Ton (ms) 1.084 1.84 2.84 4.84 Noise BW (Hz) 1100.0 441.6 235.4 121.3 Noise (mg) TYP based on 8.3 5.3 3.8 2.8 250µg/Hz ODR SMPLRT_DIV Current Consumption (µA) TYP (Hz) 255 3.9 8.4 9.4 10.8 13.6 127 7.8 9.8 11.9 14.7 20.3 63 15.6 12.8 17.0 22.5 33.7 31 31.3 18.7 27.1 38.2 60.4 15 62.5 30.4 47.2 69.4 113.9 7 125.0 57.4 87.5 132.0 220.9 3 250.0 100.9 168.1 257.0 N/A 1 500.0 194.9 329.3 N/A Table 5. Accelerometer Noise and Current Consumption Page 10 of 35 Document Number: DS-000081 Revision: 1.0 0 7 3 32x 8.84 61.5 2.0 19.2 31.4 55.9 104.9 202.8 N/A ICM-20608-G 3.3.3 A.C. Electrical Characteristics Typical Operating Circuit of section 0, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. PARAMETERS Supply Ramp Time (TRAMP) CONDITIONS SUPPLIES Monotonic ramp. Ramp rate is 10% to 90% of the final value MIN TYP MAX UNITS NOTES 100 ms 1 85 0 °C °C 326.8 LSB/°C 1 1 1 0.01 TEMPERATURE SENSOR Operating Range Room Temperature Offset Ambient 25°C Sensitivity Untrimmed Supply Ramp Time (TRAMP) Start-up time for register read/write I2C ADDRESS -40 POWER-ON RESET Valid power-on RESET From power-up From sleep AD0 = 0 AD0 = 1 0.01 11 100 100 5 ms ms ms 1 1 1 1101000 1101001 DIGITAL INPUTS (FSYNC, AD0, SCLK, SDI, CS) VIH, High Level Input Voltage 0.7*VDDIO V VIL, Low Level Input Voltage 0.3*VDD IO CI, Input Capacitance < 10 V 1 pF VOH, High Level Output Voltage DIGITAL OUTPUT (SDO, INT) RLOAD=1MΩ; 0.9*VDDIO VOL1, Low-Level Output Voltage RLOAD=1MΩ; VOL.INT, INT Low-Level Output Voltage Output Leakage Current OPEN=1, 0.3mA sink Current OPEN=1 100 nA tINT, INT Pulse Width LATCH_INT_EN=0 50 µs V 0.1*VDD IO V 0.1 V 1 I2C I/O (SCL, SDA) VIL, Low-Level Input Voltage VIH, High-Level Input Voltage -0.5V 0.3*VDD IO V 0.7*VDDIO VDDIO + 0.5V V 0.1*VDD IO Vhys, Hysteresis VOL, Low-Level Output Voltage 3mA sink current IOL, Low-Level Output Current VOL=0.4V VOL=0.6V 0 20+0.1Cb V mA mA 100 Cb bus capacitance in pf Page 11 of 35 Document Number: DS-000081 Revision: 1.0 0.4 3 6 Output Leakage Current tof, Output Fall Time from VIHmax to VILmax V nA 300 ns 1 ICM-20608-G INTERNAL CLOCK SOURCE Sample Rate Clock Frequency Initial Tolerance Frequency Variation over Temperature FCHOICE_B=1,2,3 SMPLRT_DIV=0 FCHOICE_B=0; DLPFCFG=0 or 7 SMPLRT_DIV=0 FCHOICE_B=0; DLPFCFG=1,2,3,4,5,6; SMPLRT_DIV=0 CLK_SEL=0, 6 or gyro inactive; 25°C CLK_SEL=1,2,3,4,5 and gyro active; 25°C CLK_SEL=0,6 or gyro inactive CLK_SEL=1,2,3,4,5 and gyro active 32 kHz 2 8 kHz 2 1 kHz 2 -5 +5 % 1 -1 +1 % 1 -10 +10 % 1 -1 +1 % 1 Table 6. A.C. Electrical Characteristics Notes: 1. Derived from validation or characterization of parts, not guaranteed in production. 2. Guaranteed by design. Page 12 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 3.3.4 Other Electrical Specifications Typical Operating Circuit of section 0, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. PARAMETERS CONDITIONS MIN TYP MAX UNITS NOTES kHz 1 8 MHz 1, 2 All registers, Fast-mode 400 kHz 1 All registers, Standard-mode 100 kHz 1 SERIAL INTERFACE SPI Operating Frequency, All Registers Read/Write Low-Speed Characterization High-Speed Characterization 1 Modes 0 and 3 SPI Modes I2C Operating Frequency 100 ±10% Table 7. Other Electrical Specifications Notes: 1. Derived from validation or characterization of parts, not guaranteed in production. 2. SPI clock duty cycle between 45% and 55% should be used for 8-MHz operation. Page 13 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 3.4 I2C TIMING CHARACTERIZATION Typical Operating Circuit of section 0, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. PARAMETERS CONDITIONS I2C TIMING I2C FAST-MODE MIN TYP fSCL, SCL Clock Frequency MAX UNITS NOTES 400 kHz 1 tHD.STA, (Repeated) START Condition Hold Time 0.6 µs 1 tLOW, SCL Low Period 1.3 µs 1 tHIGH, SCL High Period 0.6 µs 1 tSU.STA, Repeated START Condition Setup Time 0.6 µs 1 tHD.DAT, SDA Data Hold Time 0 µs 1 tSU.DAT, SDA Data Setup Time 100 ns 1 tr, SDA and SCL Rise Time Cb bus cap. from 10 to 400pF tf, SDA and SCL Fall Time Cb bus cap. from 10 to 400pF 20+0.1Cb 300 ns 1 20+0.1Cb 300 ns 1 tSU.STO, STOP Condition Setup Time 0.6 µs 1 tBUF, Bus Free Time Between STOP and START Condition 1.3 µs 1 pF 1 Cb, Capacitive Load for each Bus Line < 400 tVD.DAT, Data Valid Time 0.9 µs 1 tVD.ACK, Data Valid Acknowledge Time 0.9 µs 1 2 Table 8. I C Timing Characteristics Notes: 1. Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets tf SDA tSU.DAT tr 70% 30% 70% 30% continued below at tf SCL tr 70% 30% S tHD.STA tVD.DAT 70% 30% tHD.DAT 1/fSCL tLOW 1st clock cycle 9th clock cycle tHIGH tBUF SDA 70% 30% A tSU.STA tHD.STA SCL 70% 30% Sr tSU.STO tVD.ACK 9th clock cycle P Figure 1. I2C Bus Timing Diagram Page 14 of 35 Document Number: DS-000081 Revision: 1.0 S A ICM-20608-G 3.5 SPI TIMING CHARACTERIZATION Typical Operating Circuit of section 0, VDD = 1.8V, VDDIO = 1.8V, TA=25°C, unless otherwise noted. PARAMETERS CONDITIONS MIN TYP MAX UNITS NOTES 8 MHz 1 SPI TIMING fSCLK, SCLK Clock Frequency tLOW, SCLK Low Period 56 ns 1 tHIGH, SCLK High Period 56 ns 1 tSU.CS, CS Setup Time 2 ns 1 tHD.CS, CS Hold Time 63 ns 1 tSU.SDI, SDI Setup Time 3 ns 1 tHD.SDI, SDI Hold Time 7 ns 1 40 ns 1 tDIS.SDO, SDO Output Disable Time 20 ns 1 tFall, SCLK Fall Time 6.5 ns 2 tRise, SCLK Rise Time 6.5 ns 2 tDIS.SDO, SDO Output Disable Time 20 ns 1 tVD.SDO, SDO Valid Time Cload = 20pF Table 9. SPI Timing Characteristics (8MHz Operation) Notes: 1. 2. CS Based on characterization of 5 parts over temperature and voltage as mounted on evaluation board or in sockets Based on calculation from other parameter values 70% 30% tFall tSU;CS SCLK tHIGH tRise 1/fCLK tHD;CS 70% 30% tSU;SDI SDI 70% 30% tHD;SDI tLOW LSB IN MSB IN tVD;SDO SDO MSB OUT 70% LSB OUT 30% Figure 2. SPI Bus Timing Diagram Page 15 of 35 Document Number: DS-000081 Revision: 1.0 tDIS;SDO tHD;SDO ICM-20608-G 3.6 ABSOLUTE MAXIMUM RATINGS Stress above those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for extended periods may affect device reliability. PARAMETER RATING Supply Voltage, VDD -0.5V to +4V Supply Voltage, VDDIO -0.5V to +4V REGOUT -0.5V to 2V Input Voltage Level (AD0, FSYNC, SCL, SDA) -0.5V to VDD + 0.5V Acceleration (Any Axis, unpowered) 10,000g for 0.2ms Operating Temperature Range -40°C to +85°C Storage Temperature Range -40°C to +125°C 2kV (HBM); Electrostatic Discharge (ESD) Protection 250V (MM) JEDEC Class II (2),125°C Latch-up ±100mA Table 10. Absolute Maximum Ratings Page 16 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 4. APPLICATIONS INFORMATION 4.1 PIN OUT DIAGRAM AND SIGNAL DESCRIPTION PIN NUMBER PIN NAME 1 VDDIO PIN DESCRIPTION 2 SCL/SCLK I2C serial clock (SCL); SPI serial clock (SCLK) 3 SDA/SDI I2C serial data (SDA); SPI serial data input (SDI) 4 AD0/SDO I2C slave address LSB (AD0); SPI serial data output (SDO) 5 CS Chip select (0 = SPI mode; 1 = I2C mode) 6 INT Interrupt digital output (totem pole or open-drain) Digital I/O supply voltage 7 RESV Reserved. Do not connect. 8 FSYNC Synchronization digital input (optional). Connect to GND if unused. 9 RESV Reserved. Connect to GND. 10 RESV Reserved. Connect to GND. 11 RESV Reserved. Connect to GND. 12 RESV Reserved. Connect to GND. 13 GND Connect to GND 14 REGOUT 15 RESV Reserved. Connect to GND. 16 VDD Power Supply Regulator filter capacitor connection Table 11. Signal Descriptions RESV REGOUT 14 VDD 16 15 VDDIO 1 13 GND SCL/SCLK 2 12 RESV +Z ICM-20608-G SDA/SDI 3 11 RESV AD0/SDO 4 10 RESV CS 5 9 RESV 6 7 8 INT RESV FSYNC LGA Package (Top View) 16-pin, 3mm x 3mm x 0.75mm Typical Footprint and thickness ICM -20 +Y 60 8-G +X Orientation of Axes of Sensitivity and Polarity of Rotation Figure 3. Pin out Diagram for ICM-20608-G 3.0x3.0x0.75mm LGA Page 17 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 4.2 TYPICAL OPERATING CIRCUIT 1.8 – 3.3VDC RESV VDD C4, 2.2 mF C2, 0.1 mF 16 VDDIO 1.8 – 3.3 VDC C3, 10 nF SCL SCL/SCLK SDA AD0 VDDIO SDA/SDI AD0/SDO CS REGOUT 15 14 C1, 0.47 mF 1 13 2 12 3 ICM-20608-G 11 4 10 5 9 6 7 GND RESV RESV RESV RESV 8 RESV FSYNC INT Figure 4. ICM-20608-G I2C Operation Application Schematic 1.8 – 3.3VDC RESV VDD C4, 2.2 mF C2, 0.1 mF 16 VDDIO 1.8 – 3.3 VDC C3, 10 nF SCLK SCL/SCLK SDI SDO nCS SDA/SDI AD0/SDO CS REGOUT 15 14 C1, 0.47 mF 1 13 2 12 3 ICM-20608-G 11 4 10 5 9 6 7 GND RESV RESV RESV RESV 8 RESV FSYNC INT Figure 5. ICM-20608-G SPI Operation Application Schematic Page 18 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 4.3. BILL OF MATERIALS FOR EXTERNAL COMPONENTS COMPONENT LABEL REGOUT Capacitor VDD Bypass Capacitors VDDIO Bypass Capacitor SPECIFICATION QUANTITY C1 Ceramic, X7R, 0.47µF ±10%, 2V 1 C2 Ceramic, X7R, 0.1µF ±10%, 4V 1 C4 Ceramic, X7R, 2.2µF ±10%, 4V 1 C3 Ceramic, X7R, 10nF ±10%, 4V 1 Table 11. Bill of Materials 4.4. BLOCK DIAGRAM ICM-20608-G INT Self test X Accel ADC Self test Y Accel ADC Interrupt Status Register CS Slave I2C and SPI Serial Interface FIFO AD0 / SDO SCL / SCLK SDA / SDI Z Accel ADC Self test X Gyro ADC Self test Y Gyro ADC Self test Z Gyro ADC Temp Sensor Signal Conditioning Self test User & Config Registers FSYNC Sensor Registers ADC Bias & LDOs Charge Pump VDD Figure 6. ICM-20608-G Block Diagram Page 19 of 35 Document Number: DS-000081 Revision: 1.0 GND REGOUT ICM-20608-G 4.5. OVERVIEW The ICM-20608-G is comprised of the following key blocks and functions:  Three-axis MEMS rate gyroscope sensor with 16-bit ADCs and signal conditioning  Three-axis MEMS accelerometer sensor with 16-bit ADCs and signal conditioning 2  Primary I C and SPI serial communications interfaces  Self-Test  Clocking  Sensor Data Registers  FIFO  Interrupts  Digital-Output Temperature Sensor  Bias and LDOs  Charge Pump  Standard Power Modes 4.6. THREE-AXIS MEMS GYROSCOPE WITH 16-BIT ADCS AND SIGNAL CONDITIONING The ICM-20608-G consists of three independent vibratory MEMS rate gyroscopes, which detect rotation about the X-, Y-, and ZAxes. When the gyros are rotated about any of the sense axes, the Coriolis Effect causes a vibration that is detected by a capacitive pickoff. The resulting signal is amplified, demodulated, and filtered to produce a voltage that is proportional to the angular rate. This voltage is digitized using individual on-chip 16-bit Analog-to-Digital Converters (ADCs) to sample each axis. The full-scale range of the gyro sensors may be digitally programmed to ±250, ±500, ±1000, or ±2000 degrees per second (dps). The ADC sample rate is programmable from 8,000 samples per second, down to 3.9 samples per second, and user-selectable low-pass filters enable a wide range of cut-off frequencies. 4.7. THREE-AXIS MEMS ACCELEROMETER WITH 16-BIT ADCS AND SIGNAL CONDITIONING The ICM-20608-G’s 3-Axis accelerometer uses separate proof masses for each axis. Acceleration along a particular axis induces displacement on the corresponding proof mass, and capacitive sensors detect the displacement differentially. The ICM-20608-G’s architecture reduces the accelerometers’ susceptibility to fabrication variations as well as to thermal drift. When the device is placed on a flat surface, it will measure 0g on the X- and Y-axes and +1g on the Z-axis. The accelerometers’ scale factor is calibrated at the factory and is nominally independent of supply voltage. Each sensor has a dedicated sigma-delta ADC for providing digital outputs. The full scale range of the digital output can be adjusted to ±2g, ±4g, ±8g, or ±16g. 4.8. I2C AND SPI SERIAL COMMUNICATIONS INTERFACES 2 The ICM-20608-G communicates to a system processor using either a SPI or an I C serial interface. The ICM-20608-G always acts as a 2 slave when communicating to the system processor. The LSB of the I C slave address is set by pin 4 (AD0). 4.8.1 ICM-20608-G Solution Using I2C Interface 2 In the figure below, the system processor is an I C master to the ICM-20608-G. Page 20 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G Interrupt Status Register I2C Processor Bus: for reading all sensor data from ICM-20608 INT ICM-20608-G AD0 Slave I2C or SPI Serial Interface VDDIO or GND SCL SCL SDA SDA System Processor FIFO User & Config Registers Sensor Register Factory Calibration Bias & LDOs GND VDD REGOUT 2 Figure 7. ICM-20608-G Solution Using I C Interface 4.8.2 ICM-20608-G Solution Using SPI Interface In the figure below, the system processor is an SPI master to the ICM-20608-G. Pins 2, 3, 4, and 5 are used to support the SCLK, SDI, SDO, and CS signals for SPI communications. Processor SPI Bus: for reading all data from ICM-20608 and for configuring ICM-20608 Interrupt Status Register INT CS ICM-20608-G Slave I2C or SPI Serial Interface SDO SCLK SDI FIFO Config Register Sensor Register Factory Calibration Bias & LDOs VDD GND REGOUT Figure 8. ICM-20608-G Solution Using SPI Interface Page 21 of 35 Document Number: DS-000081 Revision: 1.0 nCS SDI SCLK SDO System Processor ICM-20608-G 4.9 SELF-TEST Self-test allows for the testing of the mechanical and electrical portions of the sensors. The self-test for each measurement axis can be activated by means of the gyroscope and accelerometer self-test registers (registers 27 and 28). When the self-test is activated, the electronics cause the sensors to be actuated and produce an output signal. The output signal is used to observe the self-test response. The self-test response is defined as follows: Self-test response = Sensor output with self-test enabled – Sensor output with self-test disabled The self-test response for each gyroscope axis is defined in the gyroscope specification table, while that for each accelerometer axis is defined in the accelerometer specification table. When the value of the self-test response is within the specified min/max limits of the product specification, the part has passed selftest. When the self-test response exceeds the min/max values, the part is deemed to have failed self-test. It is recommended to use InvenSense MotionApps software for executing self-test. 4.10 CLOCKING The ICM-20608-G has a flexible clocking scheme, allowing a variety of internal clock sources to be used for the internal synchronous circuitry. This synchronous circuitry includes the signal conditioning and ADCs, and various control circuits and registers. An on-chip PLL provides flexibility in the allowable inputs for generating this clock. Allowable internal sources for generating the internal clock are: a) An internal relaxation oscillator b) Auto-select between internal relaxation oscillator and gyroscope MEMS oscillator to use the best available source The only setting supporting specified performance in all modes is option b). It is recommended that option b) be used. 4.11 SENSOR DATA REGISTERS The sensor data registers contain the latest gyroscope, accelerometer, and temperature measurement data. They are read-only registers, and are accessed via the serial interface. Data from these registers may be read anytime. 4.12 FIFO The ICM-20608-G contains a 512-byte FIFO register that is accessible via the Serial Interface. The FIFO configuration register determines which data is written into the FIFO. Possible choices include gyro data, accelerometer data, temperature readings, and FSYNC input. A FIFO counter keeps track of how many bytes of valid data are contained in the FIFO. The FIFO register supports burst reads. The interrupt function may be used to determine when new data is available. The ICM-20608-G allows FIFO read in standard (duty cycle) accelerometer mode. 4.13 INTERRUPTS Interrupt functionality is configured via the Interrupt Configuration register. Items that are configurable include the INT pin configuration, the interrupt latching and clearing method, and triggers for the interrupt. Items that can trigger an interrupt are (1) Clock generator locked to new reference oscillator (used when switching clock sources); (2) new data is available to be read (from the FIFO and Data registers); (3) accelerometer event interrupts; (4) FIFO overflow. The interrupt status can be read from the Interrupt Status register. 4.14 DIGITAL-OUTPUT TEMPERATURE SENSOR An on-chip temperature sensor and ADC are used to measure the ICM-20608-G die temperature. The readings from the ADC can be read from the FIFO or the Sensor Data registers. Page 22 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 4.15 BIAS AND LDOS The bias and LDO section generates the internal supply and the reference voltages and currents required by the ICM-20608-G. Its two inputs are an unregulated VDD and a VDDIO logic reference supply voltage. The LDO output is bypassed by a capacitor at REGOUT. For further details on the capacitor, please refer to the Bill of Materials for External Components. 4.16 CHARGE PUMP An on-chip charge pump generates the high voltage required for the MEMS oscillator. 4.17 POWER MODES The following table lists the user-accessible power modes for ICM-20608-G. MODE 1 2 3 4 5 6 7 8 NAME Sleep Mode Standby Mode Accelerometer Standard Mode Accelerometer Low-Noise Mode Gyroscope Standard Mode Gyroscope Low-Noise Mode 6-Axis Low-Noise Mode 6-Axis Standard Mode GYRO Off Drive On Off Off Duty-Cycled On On Duty-Cycled Table 12. Power Modes for ICM-20608-G Page 23 of 35 Document Number: DS-000081 Revision: 1.0 ACCEL Off Off Duty-Cycled On Off Off On On ICM-20608-G 5 PROGRAMMABLE INTERRUPTS The ICM-20608-G has a programmable interrupt system which can generate an interrupt signal on the INT pin. Status flags indicate the source of an interrupt. Interrupt sources may be enabled and disabled individually. INTERRUPT NAME MODULE Motion Detection Motion FIFO Overflow FIFO Data Ready Sensor Registers Table 13. Table of Interrupt Sources 5.1 WAKE-ON-MOTION INTERRUPT The ICM-20608-G provides motion detection capability. A qualifying motion sample is one where the high passed sample from any axis has an absolute value exceeding a user-programmable threshold. The following steps explain how to configure the Wake-onMotion Interrupt. Step 1: Ensure that Accelerometer is running  In PWR_MGMT_1 register (0x6B) set CYCLE = 0, SLEEP = 0, and GYRO_STANDBY = 0  In PWR_MGMT_2 register (0x6C) set STBY_XA = STBY_YA = STBY_ZA = 0, and STBY_XG = STBY_YG = STBY_ZG = 1 Step 2: Accelerometer Configuration  In ACCEL_CONFIG2 register (0x1D) set ACCEL_FCHOICE_B = 0 and A_DLPF_CFG[2:0] = 1 (b001) Step 3: Enable Motion Interrupt  In INT_ENABLE register (0x38) set WOM_INT_EN = 111 to enable motion interrupt Step 4: Set Motion Threshold  Set the motion threshold in ACCEL_WOM_THR register (0x1F) Step 5: Enable Accelerometer Hardware Intelligence  In ACCEL_INTEL_CTRL register (0x69) set ACCEL_INTEL_EN = ACCEL_INTEL_MODE = 1; Ensure that bit 0 is set to 0. Step 6: Set Frequency of Wake-Up  In Standard Mode Configuration register (0x1E) set LPOSC_CLKSEL[3:0] for a sample rate as indicated in the register map Step 7: Enable Cycle Mode (Accelerometer Standard Mode)  In PWR_MGMT_1 register (0x6B) set CYCLE = 1 Page 24 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 6 DIGITAL INTERFACE 6.1 I2C AND SPI SERIAL INTERFACES 2 The internal registers and memory of the ICM-20608-G can be accessed using either I C at 400 kHz or SPI at 8MHz. SPI operates in four-wire mode. PIN NUMBER PIN NAME 1 VDDIO PIN DESCRIPTION 4 AD0 / SDO I2C Slave Address LSB (AD0); SPI serial data output (SDO) 2 SCL / SCLK I2C serial clock (SCL); SPI serial clock (SCLK) 3 SDA / SDI I2C serial data (SDA); SPI serial data input (SDI) Digital I/O supply voltage. Table 14. Serial Interface Note: 2 2 To prevent switching into I C mode when using SPI, the I C interface should be disabled by setting the I2C_IF_DIS configuration bit. Setting this bit should be performed immediately after waiting for the time specified by the “Start-Up Time for Register Read/Write” in Section 3.3.3. 6.2 I2C INTERFACE 2 I C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the lines are open-drain and bi2 directional. In a generalized I C interface implementation, attached devices can be a master or a slave. The master device puts the slave address on the bus, and the slave device with the matching address acknowledges the master. The ICM-20608-G always operates as a slave device when communicating to the system processor, which thus acts as the master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is 400 kHz. The slave address of the ICM-20608-G is b110100X which is 7 bits long. The LSB bit of the 7 bit address is determined by the logic 2 level on pin AD0. This allows two ICM-20608-Gs to be connected to the same I C bus. When used in this configuration, the address of one of the devices should be b1101000 (pin AD0 is logic low) and the address of the other should be b1101001 (pin AD0 is logic high). 6.3 I2C COMMUNICATIONS PROTOCOL START (S) and STOP (P) Conditions 2 Communication on the I C bus starts when the master puts the START condition (S) on the bus, which is defined as a HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is considered to be busy until the master puts a STOP condition (P) on the bus, which is defined as a LOW to HIGH transition on the SDA line while SCL is HIGH (see figure below). Additionally, the bus remains busy if a repeated START (Sr) is generated instead of a STOP condition. SDA SCL S P START condition STOP condition Figure 9. START and STOP Conditions Page 25 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G Data Format / Acknowledge 2 I C data bytes are defined to be 8-bits long. There is no restriction to the number of bytes transmitted per data transfer. Each byte transferred must be followed by an acknowledge (ACK) signal. The clock for the acknowledge signal is generated by the master, while the receiver generates the actual acknowledge signal by pulling down SDA and holding it low during the HIGH portion of the acknowledge clock pulse. If a slave is busy and cannot transmit or receive another byte of data until some other task has been performed, it can hold SCL LOW, thus forcing the master into a wait state. Normal data transfer resumes when the slave is ready, and releases the clock line (refer to the following figure). DATA OUTPUT BY TRANSMITTER (SDA) not acknowledge DATA OUTPUT BY RECEIVER (SDA) acknowledge SCL FROM MASTER 1 2 8 9 clock pulse for acknowledgement START condition 2 Figure 10. Acknowledge on the I C Bus Communications th After beginning communications with the START condition (S), the master sends a 7-bit slave address followed by an 8 bit, the read/write bit. The read/write bit indicates whether the master is receiving data from or is writing to the slave device. Then, the master releases the SDA line and waits for the acknowledge signal (ACK) from the slave device. Each byte transferred must be followed by an acknowledge bit. To acknowledge, the slave device pulls the SDA line LOW and keeps it LOW for the high period of the SCL line. Data transmission is always terminated by the master with a STOP condition (P), thus freeing the communications line. However, the master can generate a repeated START condition (Sr), and address another slave without first generating a STOP condition (P). A LOW to HIGH transition on the SDA line while SCL is HIGH defines the stop condition. All SDA changes should take place when SCL is low, with the exception of start and stop conditions. SDA SCL 1–7 8 9 1–7 8 9 1–7 8 9 S START ADDRESS condition P R/W ACK DATA ACK 2 Figure 11. Complete I C Data Transfer Page 26 of 35 Document Number: DS-000081 Revision: 1.0 DATA ACK STOP condition ICM-20608-G 2 To write the internal ICM-20608-G registers, the master transmits the start condition (S), followed by the I C address and the write th bit (0). At the 9 clock cycle (when the clock is high), the ICM-20608-G acknowledges the transfer. Then the master puts the register address (RA) on the bus. After the ICM-20608-G acknowledges the reception of the register address, the master puts the register data onto the bus. This is followed by the ACK signal, and data transfer may be concluded by the stop condition (P). To write multiple bytes after the last ACK signal, the master can continue outputting data rather than transmitting a stop signal. In this case, the ICM20608-G automatically increments the register address and loads the data to the appropriate register. The following figures show single and two-byte write sequences. Single-Byte Write Sequence Master Slave S AD+W RA ACK DATA ACK P ACK Burst Write Sequence Master Slave S AD+W RA ACK DATA ACK DATA ACK P ACK 2 To read the internal ICM-20608-G registers, the master sends a start condition, followed by the I C address and a write bit, and then the register address that is going to be read. Upon receiving the ACK signal from the ICM-20608-G, the master transmits a start signal followed by the slave address and read bit. As a result, the ICM-20608-G sends an ACK signal and the data. The communication ends with a not acknowledge (NACK) signal and a stop bit from master. The NACK condition is defined such that the th SDA line remains high at the 9 clock cycle. The following figures show single and two-byte read sequences. Single-Byte Read Sequence Master Slave S AD+W RA ACK S AD+R ACK NACK ACK P DATA Burst Read Sequence Master Slave S AD+W RA ACK S ACK AD+R ACK ACK DATA NACK P DATA 6.4 I2C TERMS SIGNAL S AD W R ACK NACK RA DATA P DESCRIPTION Start Condition: SDA goes from high to low while SCL is high 2 Slave I C address Write bit (0) Read bit (1) th Acknowledge: SDA line is low while the SCL line is high at the 9 clock cycle th Not-Acknowledge: SDA line stays high at the 9 clock cycle ICM-20608-G internal register address Transmit or received data Stop condition: SDA going from low to high while SCL is high 2 Table 15. I C Terms Page 27 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 6.5 SPI INTERFACE SPI is a 4-wire synchronous serial interface that uses two control lines and two data lines. The ICM-20608-G always operates as a Slave device during standard Master-Slave SPI operation. With respect to the Master, the Serial Clock output (SCLK), the Serial Data Output (SDO) and the Serial Data Input (SDI) are shared among the Slave devices. Each SPI slave device requires its own Chip Select (CS) line from the master. CS goes low (active) at the start of transmission and goes back high (inactive) at the end. Only one CS line is active at a time, ensuring that only one slave is selected at any given time. The CS lines of the non-selected slave devices are held high, causing their SDO lines to remain in a high-impedance (high-z) state so that they do not interfere with any active devices. SPI Operational Features 1. Data is delivered MSB first and LSB last 2. Data is latched on the rising edge of SCLK 3. Data should be transitioned on the falling edge of SCLK 4. The maximum frequency of SCLK is 8MHz 5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation. The following 7 bits contain the Register Address. In cases of multiple-byte Read/Writes, data is two or more bytes: SPI Address format MSB R/W A6 A5 A4 A3 A2 A1 LSB A0 D1 LSB D0 SPI Data format MSB D7 6. D6 D5 D4 D3 D2 Supports Single or Burst Read/Writes. SPC SDI SDO SPI Master CS1 SPI Slave 1 CS CS2 SPC SDI SDO CS SPI Slave 2 Figure 12. Typical SPI Master/Slave Configuration Page 28 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 7 ASSEMBLY This section provides general guidelines for assembling InvenSense Micro Electro-Mechanical Systems (MEMS) gyros packaged in LGA package. ORIENTATION OF AXES The diagram below shows the orientation of the axes of sensitivity and the polarity of rotation. Note the pin 1 identifier (•) in the figure. +Z +Y +Z IC M20 +Y 60 8-G +X +X Figure 13. Orientation of Axes of Sensitivity and Polarity of Rotation Page 29 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G PACKAGE DIMENSIONS 16 Lead LGA (3x3x0.75) mm NiAu pad finish Page 30 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G DIMENSIONS IN MILLIMETERS SYMBOLS A A1 A2 MIN 0.7 NOM 0.75 0.105 0.63 MAX 0.8 REF REF D 2.9 3 3.1 E 2.9 3 3.1 Lead Width W 0.2 0.25 0.3 Lead Length L e n 0.3 0.35 0.5 16 0.4 BSC Total Thickness Substrate Thickness Mold Thickness Body Size Lead Pitch Lead Count Edge Ball Center to Center Body Center to Contact Ball Ball Width Ball Diameter Ball Opening Ball Pitch Ball Count Pre-Solder Package Edge Tolerance Mold Flatness Coplanarity Ball Offset (Package) Ball Offset (Ball) Lead Edge to Package Edge D1 2 E1 1 BSC SD --- BSC BSC --- --- --------------- 0.01 0.1 0.2 0.08 ----0.06 SE b e1 n1 aaa bbb ddd eee fff M Page 31 of 35 Document Number: DS-000081 Revision: 1.0 --- BSC --- 0.11 ICM-20608-G 8 PART NUMBER PACKAGE MARKING The part number package marking for ICM-20608-G devices is summarized below: PART NUMBER PART NUMBER PACKAGE MARKING ICM-20608-G IC268G Page 32 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G 9.REFERENCE Please refer to “InvenSense MEMS Handling Application Note (AN-IVS-0002A-00)” for the following information:  Manufacturing Recommendations o Assembly Guidelines and Recommendations o PCB Design Guidelines and Recommendations o MEMS Handling Instructions o ESD Considerations o Reflow Specification o Storage Specifications o Package Marking Specification o Tape & Reel Specification o Reel & Pizza Box Label o Packaging o Representative Shipping Carton Label  Compliance o Environmental Compliance o DRC Compliance o Compliance Declaration Disclaimer Page 33 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G REVISION HISTORY REVISION DATE REVISION NUMBER 06/15/2015 1.0 DESCRIPTION Initial Release Page 34 of 35 Document Number: DS-000081 Revision: 1.0 ICM-20608-G COMPLIANCE DECLARATION DISCLAIMER InvenSense believes the environmental and other compliance information given in this document to be correct but cannot guarantee accuracy or completeness. Conformity documents substantiating the specifications and component characteristics are on file. InvenSense subcontracts manufacturing and the information contained herein is based on data received from vendors and suppliers, which has not been validated by InvenSense. This information furnished by InvenSense is believed to be accurate and reliable. However, no responsibility is assumed by InvenSense for its use, or for any infringements of patents or other rights of third parties that may result from its use. Specifications are subject to change without notice. InvenSense reserves the right to make changes to this product, including its circuits and software, in order to improve its design and/or performance, without prior notice. InvenSense makes no warranties, neither expressed nor implied, regarding the information and specifications contained in this document. InvenSense assumes no responsibility for any claims or damages arising from information contained in this document, or from the use of products and services detailed therein. This includes, but is not limited to, claims or damages based on the infringement of patents, copyrights, mask work and/or other intellectual property rights. Certain intellectual property owned by InvenSense and described in this document is patent protected. No license is granted by implication or otherwise under any patent or patent rights of InvenSense. This publication supersedes and replaces all information previously supplied. Trademarks that are registered trademarks are the property of their respective companies. InvenSense sensors should not be used or sold in the development, storage, production or utilization of any conventional or mass-destructive weapons or for any other weapons or life threatening applications, as well as in any other life critical applications such as medical equipment, transportation, aerospace and nuclear instruments, undersea equipment, power plant equipment, disaster prevention and crime prevention equipment. ©2015 InvenSense, Inc. All rights reserved. InvenSense, MotionTracking, MotionProcessing, MotionProcessor, MotionFusion, MotionApps, DMP, AAR, and the InvenSense logo are trademarks of InvenSense, Inc. Other company and product names may be trademarks of the respective companies with which they are associated. ©2015 InvenSense, Inc. All rights reserved. Page 35 of 35 Document Number: DS-000081 Revision: 1.0
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