TC74HC173AP

TC74HC173AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC173AP,TC74HC173AF Quad D-Type Register (3-state) The TC74HC173A is a high speed CMOS D-TYPE REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It consists a 4-bit register consisting of D-type flip-flops and 3-state buffers. The four flip-flops are controlled by a common clock input (CK) and a common clear input (CLR). Signals applied to the data inputs (D1~D4) are stored in the respective flip-flops on the positive going transition of CK when clock control inputs (G1, G2) are held low. The clear function is asynchronous to CK and active on a high level. The stored data are enabled to each outputs when output control inputs (M, N) are held low, else the outputs are high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HC173AP TC74HC173AF Features • • • • • • • • High speed: fmax = 47 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 15 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 6 mA (min) ∼ Balanced propagation delays: tpLH − tpHL Wide operating voltage range: VCC (opr) = 2~6 V Pin and function compatible with 74LS173 Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Pin Assignment 1 2007-10-01 TC74HC173AP/AF IEC Logic Symbol Truth Table CLR X X H L L L L L CK X X X X X X X H X L L Data Inable G1 G2 X X X X X H L L X X X X X X H L Dn Outputs Control M H X L L L L L L N X H L L L L L L Z Z L Q0 Q0 Q0 H L Qn X: Don’t care Z: High impedance 2 2007-10-01 TC74HC173AP/AF System Diagram Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5~7 −0.5~VCC + 0.5 −0.5~VCC + 0.5 ±20 ±20 ±35 ±75 500 (DIP) (Note 2)/180 (SOP) −65~150 Unit V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be applied until 300 mW. 3 2007-10-01 TC74HC173AP/AF Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Symbol VCC VIN VOUT Topr Rating 2~6 0~VCC 0~VCC −40~85 0~1000 (VCC = 2.0 V) Input rise and fall time tr, tf 0~500 (VCC = 4.5 V) 0~400 (VCC = 6.0 V) ns Unit V V V °C Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition VCC (V) 2.0 High-level input voltage VIH ⎯ 4.5 6.0 2.0 Low-level input voltage VIL ⎯ 4.5 6.0 2.0 IOH = −20 μA High-level output voltage VOH VIN = VIH or VIL IOH = −6 mA IOH = −7.8 mA IOL = 20 μA Low-level output voltage VOL VIN = VIH or VIL IOL = 6 mA IOL = 7.8 mA 3-state output off-state current Input leakage current Quiescent supply current IOZ IIN ICC VIN = VIH or VIL VOUT = VCC or GND VIN = VCC or GND VIN = VCC or GND 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 6.0 Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ 1.9 4.4 5.9 4.18 5.68 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.26 0.26 ±0.5 ±0.1 4.0 Ta = −40~85°C Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ 1.9 4.4 5.9 4.13 5.63 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.1 0.1 0.1 0.33 0.33 ±5.0 ±1.0 40.0 μA μA μA V V V V Unit 4 2007-10-01 TC74HC173AP/AF Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width (CK) tW (L) tW (H) 2.0 ⎯ 4.5 6.0 2.0 tW (H) ⎯ 4.5 6.0 2.0 ts ⎯ 4.5 6.0 2.0 ts ⎯ 4.5 6.0 2.0 th ⎯ 4.5 6.0 2.0 trem ⎯ 4.5 6.0 2.0 Clock frequency f ⎯ 4.5 6.0 Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Limit 75 15 13 75 15 13 100 20 17 75 15 13 0 0 0 5 5 5 9 43 51 Ta = −40 ~85°C Limit 95 19 16 95 19 16 125 25 21 95 19 16 0 0 0 5 5 5 7 34 40 ns ns ns ns ns ns ns Unit Minimum pulse width (CLR) Minimum set-up time (G1, G2) Minimum set-up time (D) Minimum hold time (G1, G2, D) Minimum removal time (CLR) 5 2007-10-01 TC74HC173AP/AF AC Characteristics (input: tr = tf = 6 ns) Characteristics Symbol Test Condition CL (pF) VCC (V) 2.0 ⎯ 50 4.5 6.0 2.0 50 Propagation delay time (CK-Q) tpLH tpHL ⎯ 150 4.5 6.0 2.0 4.5 6.0 2.0 50 Propagation delay time (CLR-Q) 150 tpHL ⎯ 4.5 6.0 2.0 4.5 6.0 2.0 50 Output enable time tpZL tpZH RL = 1 kΩ 150 4.5 6.0 2.0 4.5 6.0 tpLZ tpHZ 2.0 RL = 1 kΩ 50 4.5 6.0 2.0 Maximum clock frequency Input capacitance Output capacitance Power dissipation capacitance fmax ⎯ 50 4.5 6.0 CIN COUT CPD (Note) ⎯ ⎯ ⎯ Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 9 43 51 ⎯ ⎯ ⎯ Ta = 25°C Typ. 20 6 5 50 15 12 65 20 16 50 15 12 63 20 16 50 15 12 63 20 16 36 17 15 20 67 84 5 10 45 Max 60 12 10 115 23 20 155 31 26 115 23 20 155 31 26 115 23 20 115 31 26 135 27 23 ⎯ ⎯ ⎯ 10 ⎯ ⎯ Ta = −40~85°C Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 7 34 40 ⎯ ⎯ ⎯ Max 75 15 13 145 29 25 195 39 33 145 29 25 195 39 33 145 29 25 195 39 33 170 34 29 ⎯ ⎯ ⎯ 10 ⎯ ⎯ pF pF pF MHz ns ns ns ns ns Unit Output transition time tTLH tTHL Output disable time Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/4 (per flip flop) And the total CPD when n pcs of flip flop operate be gained by the following equation: CPD (total) = 28 + 17･n 6 2007-10-01 TC74HC173AP/AF Package Dimensions Weight: 1.00 g (typ.) 7 2007-10-01 TC74HC173AP/AF Package Dimensions Weight: 0.18 g (typ.) 8 2007-10-01 TC74HC173AP/AF RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2007-10-01