TC74HC4020AP

TC74HC4020,4040AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4020AP,TC74HC4020AF,TC74HC4020AFN TC74HC4040AP,TC74HC4040AF,TC74HC4040AFN TC74HC4020AP/AF/AFN TC74HC4040AP/AF/AFN 14-Stage Binary Counter 12-Stage Binary Counter Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC4020AP, TC74HC4040AP The TC74HC4020A/TC74HC4040A are high speed CMOS BINARY COUNTER/DIVIDERs fabricated with silicon gate C2MOS technology. They achieve the high speed operetion similar to equivalent LSTTL while maintaining the CMOS dissipation. The TC74HC4020A is a 14-STAGE BINARY COUNTER, and the TC74HC4040A is a 12-STAGE BINARY COUNTER. Setting CLR to high resets the counter to low. A negative transition on the CK input brings one increment into the counter. The TC74HC4020A provides 12 divided outputs: 1’st stage and stage 4 thru stage 14. At Q14, a 1/16384 divided frequency will be output. The TC74HC4040A provides all divided output stages, and at Q12, a 1/4096 divided frequency will be output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HC4020AF, TC74HC4040AF TC74HC4020AFN, TC74HC4040AFN Features • • • • • • • • High speed: fmax = 73 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 4 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) Balanced propagation delays: tpLH ∼ tpHL − Wide operating voltage range: VCC (opr) = 2~6 V Pin and function compatible with 4020B/4040B Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) 1 2007-10-01 TC74HC4020,4040AP/AF/AFN Pin Assignment TC74HC4020A TC74HC4040A IEC Logic Symbol TC74HC4020A TC74HC4040A Truth Table CK X CLR H L L Output State All Output = “L” No Change Adovance to Next State X: Don’t care 2 2007-10-01 TC74HC4020,4040AP/AF/AFN System Diagram TC74HC4020A TC74HC4040A 3 2007-10-01 TC74HC4020,4040AP/AF/AFN Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating −0.5~7 −0.5~VCC + 0.5 −0.5~VCC + 0.5 ±20 ±20 ±25 ±50 Unit V V V mA mA mA mA mW °C 500 (DIP) (Note 2)/180 (SOP) −65~150 Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be applied until 300 mW. Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Symbol VCC VIN VOUT Topr Rating 2~6 0~VCC 0~VCC −40~85 Unit V V V °C 0~1000 (VCC = 2.0 V) Input rise and fall time tr, tf 0~500 (VCC = 4.5 V) 0~400 (VCC = 6.0 V) ns Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 4 2007-10-01 TC74HC4020,4040AP/AF/AFN Electrical Characteristics DC Characteristics Test Condition Characteristics Symbol VCC (V) 2.0 High-level input voltage VIH ⎯ Ta = 25°C Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ Ta = −40~85°C Max ⎯ ⎯ ⎯ Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Min 1.50 3.15 4.20 ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ Unit 4.5 6.0 2.0 V 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ 0.50 1.35 1.80 ⎯ ⎯ ⎯ ⎯ ⎯ Low-level input voltage VIL ⎯ 4.5 6.0 2.0 V 1.9 4.4 5.9 4.18 5.68 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 ⎯ ⎯ 1.9 4.4 5.9 4.13 5.63 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ High-level output voltage VOH VIN = VIH or VIL IOH = −20 μA IOH = −4 mA IOH = −5.2 mA IOL = 20 μA IOL = 4 mA IOL = 5.2 mA 4.5 6.0 4.5 6.0 2.0 V 0.1 0.1 0.1 0.26 0.26 ±0.1 0.1 0.1 0.1 0.33 0.33 ±1.0 μA μA Low-level output voltage VOL VIN = VIH or VIL 4.5 6.0 4.5 6.0 6.0 6.0 V Input leakage current Quiescent supply current IIN ICC VIN = VCC or GND VIN = VCC or GND 4.0 40.0 Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width ( CK ) tW (L) tW (H) 2.0 ⎯ Ta = 25°C Typ. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = −40 ~85°C Limit 95 19 16 95 19 16 30 6 5 5 24 28 Unit Limit 75 15 13 75 15 13 25 5 5 6 30 35 4.5 6.0 2.0 ns Minimum pulse width (CLR) tW (H) ⎯ 4.5 6.0 2.0 ns Minimum removal time trem ⎯ 4.5 6.0 2.0 ns Clock frequency f ⎯ 4.5 6.0 MHz 5 2007-10-01 TC74HC4020,4040AP/AF/AFN AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns) Characteristics Output transition time Propagation delay time ( CK -Q1) Propagation delay time (Qn-Qn + 1) Propagation delay time (CLR) Maximum clock frequency Symbol tTLH tTHL tpLH tpHL Δtpd Test Condition ⎯ Min ⎯ Typ. 4 Max 8 Unit ns ⎯ ⎯ 16 24 ns ⎯ ⎯ 5 14 ns tpHL fmax ⎯ ⎯ ⎯ 14 73 24 ⎯ ns MHz 33 AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns) Test Condition Characteristics Symbol VCC (V) 2.0 ⎯ Ta = 25°C Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Ta = −40~85°C Max 75 15 13 145 29 25 75 15 13 140 28 24 ⎯ ⎯ ⎯ Typ. 30 8 7 70 20 17 20 6 4 55 17 14 17 66 78 5 27 37 Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max 95 19 16 180 36 31 95 19 16 175 35 30 ⎯ ⎯ ⎯ Unit Output transition time tTLH tTHL tpLH tpHL 4.5 6.0 2.0 ns Propagation delay time ( CK -Q1) Propagation delay time (Qn-Q + 1) Propagation delay time (CLR) ⎯ 4.5 6.0 2.0 ns Δtpd ⎯ 4.5 6.0 2.0 ns tpHL ⎯ 4.5 6.0 2.0 ns 6 30 35 ⎯ ⎯ ⎯ 5 24 28 ⎯ ⎯ ⎯ Maximum clock frequency Input capacitance Power dissipation capacitance fmax ⎯ 4.5 6.0 MHz CIN CPD TC74HC4020A ⎯ 10 ⎯ ⎯ 10 ⎯ ⎯ pF pF (Note) TC74HC4040A Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC 6 2007-10-01 TC74HC4020,4040AP/AF/AFN Package Dimensions Weight: 1.00 g (typ.) 7 2007-10-01 TC74HC4020,4040AP/AF/AFN Package Dimensions Weight: 0.18 g (typ.) 8 2007-10-01 TC74HC4020,4040AP/AF/AFN Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.13 g (typ.) 9 2007-10-01 TC74HC4020,4040AP/AF/AFN RESTRICTIONS ON PRODUCT USE • The information contained herein is subject to change without notice. 20070701-EN GENERAL • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 10 2007-10-01