TC74LCX74F/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX74F, TC74LCX74FK
Low-Voltage Dual D-Type Flip-Flop with 5-V Tolerant Inputs and Outputs
The TC74LCX74 is a high-performance CMOS D-type flip-flop.
Designed for use in 3.3-V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
The device is designed for low-voltage (3.3 V) VCC applications, but it
could be used to interface to 5-V supply environment for inputs.
The signal level applied to the D input is transferred to Q output
during the positive going transition of the CK pulse. CLR and PR
are independent of the CK and are accomplished by setting the
appropriate input low.
All inputs are equipped with protection circuits against static
discharge.
TC74LCX74F
TC74LCX74FK
Features
Low-voltage operation: VCC = 1.65 to 3.6 V
High-speed operation: tpd = 7.0 ns (max) (VCC = 3.0 to 3.6 V)
Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
Latch-up performance: ＞±500 mA
Available in JEITA SOP, VSSOP (US)
Power-down protection is provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 74 type
Weight
SOP14-P-300-1.27A
VSSOP14-P-0030-0.50
: 0.18 g ( typ.)
: 0.02 g ( typ.)
Note: The Electrical Characteristics of VCC = 1.8 ± 0.15 V is only applicable for products which manufactured
from January 2009 onward.
Start of commercial production
1994-10
© 2018
Toshiba Electronic Devices & Storage Corporation
1
2018-12-26
TC74LCX74F/FK
Pin Assignment (top view)
IEC Logic Symbol
4
1D
1
14
2
13
CK
1CK
3
D
Q
12
4
11
VCC
S
3
1D
2
1D
1
R
C1
10
2D
2CK
2CK
11
2D
12
5
2Q
8
10
CK
6
GND
1Q
6
9
13
1Q
5
1CK
D
Q
9
7
2Q
8
Truth Table
Inputs
Outputs
Function
CLR
PR
D
CK
Q
Q
L
H
X
X
L
H
Clear
H
L
X
X
H
L
Preset
L
L
X
X
H
H
H
H
L
L
H
H
H
H
H
L
H
H
X
Qn
Qn
No change
X: Don’t care
Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Power supply voltage
VCC
0.5 to 7.0
V
DC input voltage
VIN
0.5 to 7.0
V
DC output voltage
VOUT
Input diode current
IIK
Output diode current
IOK
DC output current
IOUT
Power dissipation
DC VCC/ground current
Storage temperature
0.5 to 7.0 (Note 2)
0.5 to VCC 0.5
(Note 3)
50
50
V
mA
(Note 4)
mA
50
mA
PD
180
mW
ICC/IGND
100
mA
Tstg
65 to 150
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant
change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating
conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the
operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 2: VCC0 V
Note 3: High or low state. IOUT absolute maximum rating must be observed.
Note 4: VOUT GND, VOUT VCC
© 2018
Toshiba Electronic Devices & Storage Corporation
2
2018-12-26
TC74LCX74F/FK
Operating Ranges (Note 1)
Characteristics
Symbol
Rating
Unit
1.65 to 3.6
Power supply voltage
VCC
Input voltage
Output voltage
Output current
VIN
VOUT
IOH/IOL
V
1.5 to 3.6
(Note 2)
0 to 5.5
V
0 to 5.5
(Note 3)
0 to VCC
(Note 4)
24
(Note 5)
12
(Note 6)
V
Operating temperature
Topr
40 to 85
Input rise and fall time
dt/dv
0 to 10
mA
°C
(Note 7)
ns/V
Note 1: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 2: Data retention only
Note 3: VCC 0 V
Note 4: High or low state
Note 5: VCC 3.0 to 3.6 V
Note 6: VCC 2.7 to 3.0 V
Note 7: VIN 0.8 to 2.0 V, VCC 3.0 V
© 2018
Toshiba Electronic Devices & Storage Corporation
3
2018-12-26
TC74LCX74F/FK
Electrical Characteristics
DC Characteristics (Ta 40 to 85°C)
Characteristics
Symbol
Test Condition
Min
Max
Unit
1.65 to 2.3
VCC×0.9
2.3 to 2.7
1.7
2.7 to 3.6
2.0
1.65 to 2.3
VCC×0.1
2.3 to 2.7
0.7
2.7 to 3.6
0.8
1.65 to 3.6
VCC0.2
IOH 4 mA
1.65
1.05
IOH 8 mA
2.3
1.7
IOH 12 mA
2.7
2.2
IOH 18 mA
3.0
2.4
IOH 24 mA
3.0
2.2
IOL 100 A
1.65 to 3.6
0.2
IOL 4 mA
1.65
0.45
IOL 8 mA
2.3
0.7
IOL 12 mA
2.7
0.4
IOL 16 mA
3.0
0.4
IOL 24 mA
3.0
0.55
1.65 to 3.6
5.0
A
VIN/VOUT 5.5 V
0
10.0
A
VIN VCC or GND
1.65 to 3.6
10.0
VIN 3.6 to 5.5 V
1.65 to 3.6
10.0
VIH VCC 0.6V (per 1 input)
2.7 to 3.6
500
VCC (V)
H-level
VIH
Input voltage
L-level
VIL
IOH 100 A
H-level
VOH
VIN VIH or VIL
Output voltage
L-level
Input leakage current
VOL
IIN
Power-off leakage current
IOFF
Quiescent supply current
ICC
Increase in ICC per input
ICC
VIN VIH or VIL
VIN 0 to 5.5 V
© 2018
Toshiba Electronic Devices & Storage Corporation
4
V
V
A
2018-12-26
TC74LCX74F/FK
AC Characteristics (Ta 40 to 85°C)
Characteristics
Symbol
Test Condition
Min
Max
1.8 0.15
50
2.5 0.2
100
2.7
100
3.3 0.3
150
1.8 0.15
22.0
2.5 0.2
9.0
2.7
8.0
3.3 0.3
1.5
7.0
1.8 0.15
22.0
2.5 0.2
9.0
2.7
8.0
3.3 0.3
1.5
7.0
1.8 0.15
10.0
2.5 0.2
5.0
2.7
3.3
3.3 0.3
3.3
1.8 0.15
10.0
2.5 0.2
5.0
2.7
3.6
3.3 0.3
3.3
1.8 0.15
10.0
2.5 0.2
5.0
2.7
2.5
3.3 0.3
2.5
1.8 0.15
1.5
2.5 0.2
1.5
2.7
1.5
3.3 0.3
1.5
1.8 0.15
10.0
2.5 0.2
5.0
2.7
3.0
3.3 0.3
2.5
2.7
3.3 0.3
1.0
Unit
VCC (V)
Maximum clock frequency
Propagation delay time
(CK-Q, Q )
Propagation delay time
( CLR , PR -Q, Q )
fmax
tpLH
tpHL
tpLH
tpHL
Minimum pulse width
tW (H)
(CK)
tW (L)
Minimum pulse width
( CLR , PR )
Minimum setup time
Minimum hold time
Minimum removal time
Output to output skew
Note:
tW (L)
ts
th
trem
Figure 1, Figure 2
Figure 1, Figure 2
Figure 1, Figure 4
Figure 1, Figure 2
Figure 1, Figure 4
Figure 1, Figure 2
Figure 1, Figure 2
Figure 1, Figure 3
tosLH
(Note)
tosHL
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Parameter guaranteed by design.
(tosLH |tpLHm tpLHn|, tosHL |tpHLm tpHLn|)
© 2018
Toshiba Electronic Devices & Storage Corporation
5
2018-12-26
TC74LCX74F/FK
Dynamic Switching Characteristics (Ta 25°C, input: tr tf 2.5 ns, CL 50 pF, RL 500 )
Characteristics
Symbol
Test Condition
Typ.
Unit
VCC (V)
Quiet output maximum dynamic VOL
VOLP
VIH 3.3 V, VIL 0 V
3.3
0.8
V
Quiet output minimum dynamic VOL
|VOLV|
VIH 3.3 V, VIL 0 V
3.3
0.8
V
Typ.
Unit
Capacitive Characteristics (Ta 25°C)
Characteristics
Symbol
Test Condition
VCC (V)
Input capacitance
Output capacitance
Power dissipation capacitance
Note:
CIN
3.3
7
pF
COUT
0
8
pF
3.3
25
pF
CPD
fIN 10 MHz
(Note)
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) CPD･VCC･fIN ICC/2 (per bit)
AC Test Circuit
Output
RL
CL
Measure
Figure 1
© 2018
Toshiba Electronic Devices & Storage Corporation
6
2018-12-26
TC74LCX74F/FK
AC Waveform
tr
tf
VIH
90%
VIM
Input
(CK)
10%
GND
tr
tw (H)
tf
tw (L)
VIH
90%
VIM
Input
(D)
10%
GND
ts (H)
th (H)
ts (L)
th (L)
VOH
Output
(Q,
)
VOM
tpHL, LH
VOL
tpLH, HL
Figure 2
tpLH, tpHL, tw, ts, th
tr
Input
(
,
VIH
90%
)
VIM
10%
VIH
Input
(
)
GND
GND
tw (L)
tr
Input
(CK)
90%
VIM
10%
trem
VIH
VIH
Input
(
)
GND
VOH
Output
(Q,
)
VOH
Output
(Q,
)
VOL
Figure 3
GND
tw (L)
trem
VOM
VOM
tpHL, LH
tpHL, LH
Figure 4
VOL
tpLH, tpHL
VCC
Symbol
3.3 0.3 V
2.7 V
Input
2.5 0.2 V
1.8 0.15 V
VIH
2.7 V
VCC
VCC
VIM
1.5 V
VCC/2
VCC/2
tr, tf
2.5 ns
2.0 ns
2.0 ns
Output
VOM
1.5 V
VOH/2
VOH/2
Load
CL
50 pF
30 pF
30 pF
RL
500 Ω
500 Ω
1 kΩ
© 2018
Toshiba Electronic Devices & Storage Corporation
7
2018-12-26
TC74LCX74F/FK
Package Dimensions
Weight: 0.18 g (typ.)
© 2018
Toshiba Electronic Devices & Storage Corporation
8
2018-12-26
TC74LCX74F/FK
Package Dimensions
Weight: 0.02 g (typ.)
© 2018
Toshiba Electronic Devices & Storage Corporation
9
2018-12-26
TC74LCX74F/FK
RESTRICTIONS ON PRODUCT USE
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Hardware, software and systems described in this document are collectively referred to as “Product”.
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written permission, reproduction is permissible only if reproduction is without alteration/omission.
Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for
complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to
property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the
Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information,
including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and
conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product
will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited
to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the
applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any
other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO
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EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
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