WL9005P3-33R

WL9005 0.3μA IQ ,High PSRR,500mA Low-Dropout LDO Features • Low Power Consumption: 0.3uA (Typ) • Maximum Output Current: 500mA • Small Dropout Voltage • • • • • • • 100mV@100mA (Vout=3.3V) • PSRR=70dB@1KHz • Input Voltage Range: 2.0V~7.0V • Output Voltage Range: 0.8V~3.6V Integrated Short-Circuit Protection Good Transient Response Over-Temperature Protection Support Fixed Output Voltage Output Current Limit Stable with Ceramic Capacitor Available Package SOT23-3 \ SOT23-5 \ SOT89-3 \ DFN1x1-4L (customized on command in 0.05V steps) • RoHS Compliant and Lead (Pb) Free • High Accurate: ±1.5% Application • Battery-powered equipment • Reference voltage sources • Mobile phones • Cameras, video cameras • Portable games Description The WL9005 series are highly precise, low noise, positive voltage LDO regulators manufactured using CMOS processes. The series achieves high ripple rejection and low dropout and consists of a standard voltage source, an error correction, current limiter and a phase compensation circuit plus a driver transistor. Output voltage is selectable in 0.05V increments within a range of 0.8V ~ 3.6V. The series is also compatible with low ESR ceramic capacitors which give added output stability.It provides up to 500mA of output current in miniaturized packaging. The features of low quiescent current as low as 0.3μA and almost zero disable current is ideal for powering the battery equipment to a longer service life. The other features include current limit function, Integrated ShortCircuit Protection ,over temperature protection and output discharge function. Application Circuits VIN VIN VOUT VOUT COUT 10μF CIN EN 10μF ON/ OFF !ev.2.1_Jan_2019 NC GND -1- www.wpmtek.com WL9005 0.3μA IQ ,High PSRR,500mA Low-Dropout LDO Pin Configuration SOT23-5L 5 4 SOT23-3L 2 1 3 1 2 SOT89-3L 3 1 2 DFN1x1-4L 3 Pin Description Pin No. SOT23-3L SOT23-5L SOT89-3L DFN1x1-4L Pin Name Pin Function 2 1 2 4 VIN Supply voltage input. 1 2 1 2 GND Ground. ----- 3 ----- 3 CE Chip Enable ----- 4 ----- ----- NC No Internal Connection. 3 5 3 1 VOUT Voltage Output. ----- ----- ----- 5 SGND Substrate of Chip. Leave floating or tie to GND. Order Information WL9005①②-③④ Designator Symbol Description ①② S3/S5/P3/D4 SOT23-3L / SOT23-5L / SOT89-3L / DFN1x1-4L Integer ③④ Model Output Voltage (09、10、12、15、18、25、28、30、33、36) Marking** WL9005S3-XX* ---- WL9005S5-XX* ---- WL9005P3-XX* ---- WL9005D4-XX* ---- Description WL9005 0.3μA IQ ,High PSRR 500mA Low-Dropout LDO Package T/R Qty SOT23-3L 3,000 PCS SOT23-5L 3,000 PCS SOT89-3L 1,000 PCS DFN1x1-4L 10,000 PCS Note：(*) XX Represents the Output Voltage (**) !ev.2.1_Jan_2019 For marking information, contact our sales representative directly -2- www.wpmtek.com WL9005 0.3μA IQ ,High PSRR,500mA Low-Dropout LDO Absolute Maximum Ratings (1) (2) Parameter Symbol Maximum Rating Unit VIN VON/OFF VSS -0.3~VSS+9.0 VSS -0.3~VIN+0.3 V V Output Current IOUT 550 mA Output Voltage VOUT VSS -0.3~VIN+0.3 V Input Voltage SOT23-3 400 SOT23-5 Power Dissipation 450 Pd SOT89-3 500 DFN1x1-4L Thermal Resistance SOT23-3 SOT23-5 SOT89-3 DFN1x1-4L mW 400 RθJA (3) (Junction-to-ambient thermal resistance) 250 220 200 ℃/W ℃/W ℃/W 250 ℃/W Operating Temperature Topr -40~85 ℃ Storage Temperature Tstg -40~125 ℃ Soldering Temperature & Time Tsolder 260℃, 10s Note (1): Exceeding these ratings may damage the device. Note (2): The device is not guaranteed to function outside of its operating conditions Note (3): The package thermal impedance is calculated in accordance to JESD 51-7. ESD Ratings Item V(ESD-HBM) V(ESD-CDM) ILATCH-UP Description Human Body Model (HBM) ANSI/ESDA/JEDEC JS-001-2014 Classification, Class: 2 Charged Device Mode (CDM) ANSI/ESDA/JEDEC JS-002-2014 Classification, Class: C0b Value Unit ±4000 V ±200 V ±150 mA JEDEC STANDARD NO.78E APRIL 2016 Temperature Classification, Class: I ESD testing is performed according to the respective JESD22 JEDEC standard.The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Recommended Operating Conditions Parameter MIN. MAX. Units Supply voltage at VIN 2.0 7.0 V Operating junction temperature range, Tj -40 125 °C Operating free air temperature range, TA -25 85 °C Note : All limits specified at room temperature (TA = 25°C) unless otherwise specified. All room temperature limits are 100% production tested. All limits at temperature extremes are ensured through correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). !ev.2.1_Jan_2019 -3- www.wpmtek.com WL9005 0.3μA IQ ,High PSRR,500mA Low-Dropout LDO Electrical Characteristics (TestConditions:VIN=4.3V, VOUT=3.3V,CIN=10uF, COUT=10uF,TA=25℃, unless otherwise specified.) Parameter Symbol Input Voltage VIN Supply Current IQ Standby Current ISTBY Output Voltage VOUT VIN=Vset+1.0V IOUT=100mA Maximum Output Current IOUT(Max) VIN=VOUT+1.0V 500 Dropout Voltage VDROP(1) IOUT=100mA 100 220 Line Regulation ΔVOUT/ ΔVIN•VOUT Load Regulation ΔVOUT IOUT=200mA IOUT=10mA (Vset+0.5v)≦VIN≦7.0V VIN=Vset+1.0V 1mA≦IOUT≦100mA Current Limit Short Current ILIMIT Power Supply Rejection Rate EN Threshold Voltage ISHORT PSRR Conditions Typ Max Units 2.0 — 7.0 V 0.3 0.7 uA 0.1 uA Vset*1.015 V VIN > VOUT ,EN=VIN ILOAD=0mA VEN = 0 Vset*0.985 — RL=1Ω VIN=Vset+1.0V f=1KHz,IOUT= 100mA VIN=Vset+1.0V f=10KHz,IOUT= 100mA VIL VIN=3V~ 5.5V, Shutdown VIH VIN=3V~ 5.5V, Start-Up Output Noise eNO Voltage Output Voltage ΔVOUT/ Temperature ΔT•VOUT Coefficient Thermal Shutdown TSD Temperature Thermal Shutdown ΔTSD Hysteresis Min Vset mA mV 0.1 %/V 20 mV 550 90 — mA mA 70 dB 65 dB 0.4 1.2 COUT=1uF BW = 100Hz~10kHz 100 uVRMS IOUT=30mA ±100 ppm/℃ — 160 — ℃ — 20 — ℃ Note：(1) Dropout Voltage is the voltage difference between the input and the output at which the output voltage drops 2% below its nominal value. !ev.2.1_Jan_2019 -4- www.wpmtek.com WL9005 0.3μA IQ ,High PSRR,500mA Low-Dropout LDO Typical Performance Characteristics Test Condition: TA=25°C, unless otherwise note 1、VOUT vs TEMP 2、IQ vs VIN (※) 3、Load Regulation 4、Line Regulation 5、Dropout Voltage vs Load Current 6、PSRR Note：(※)IQ refers to the working current when the chip is no-load, only when Vin >vout The chip will have a very low working current, the above diagram is for Vout 1.5v Measured Curve, when Vin