74HC137DB118

74HC137 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 5 — 4 August 2021 Product data sheet 1. General description The 74HC137 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features a latch enable (LE) and two output enable (E1, E2) inputs. A LOW on LE causes the device to act as an active LOW decoder. A LOW-to HIGH transition on LE stores the data that was present before the transition in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable inputs control the state of the outputs independently of the address inputs or latch operation. All outputs will be HIGH unless E1 is LOW and E2 is HIGH. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • • • • • • • • • • Combines 3-to-8 decoder with 3-bit latch Multiple input enable for easy expansion or independent controls Active LOW mutually exclusive outputs Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC137D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC137DB -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HC137PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 4. Functional diagram 4 LE Y0 15 Y1 14 Y2 13 1 A0 2 A1 INPUT LATCHES 3 A2 Y3 12 3 TO 8 DECODER Y4 11 Y5 10 Y6 9 Y7 7 5 E1 6 E2 001aab881 Fig. 1. Functional diagram DX 4 1 2 3 C8 0 0 0 8D,G 7 2 1 2 3 4 5 4 6 5 & 6 7 LE Y0 Y1 1 2 3 A0 A1 A2 Y2 INPUT LATCHES Y3 3 TO 8 DECODER Y4 Y5 Y6 Y7 5 6 14 4 12 1 11 2 10 3 9 C8 0 8D,1 1 8D,2 2 8D,4 3 4 7 5 6 5 & 001aab879 74HC137 Product data sheet 13 12 11 10 9 7 X/Y 13 E1 Logic symbol 14 15 6 7 15 14 13 12 11 10 9 7 EN E2 Fig. 2. 15 001aab880 Fig. 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 2 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting A0 LATCH LE A1 LATCH LE A0 Y0 A0 LE Y1 A1 A1 LE Y2 A2 A2 LATCH LE Y3 A2 LE Y4 LE Y5 Y6 Y7 E1 001aab882 E2 Fig. 4. Logic diagram 5. Pinning information 5.1. Pinning 74HC137 A0 1 16 VCC A1 2 15 Y0 A2 3 14 Y1 A0 1 16 VCC A1 2 15 Y0 A2 3 14 Y1 LE 4 13 Y2 LE 4 13 Y2 E1 5 12 Y3 E1 5 12 Y3 6 11 Y4 10 Y5 E2 6 11 Y4 E2 Y7 7 10 Y5 Y7 7 GND 8 GND 8 9 Y6 001aab878 Fig. 5. 74HC137 Pin configuration SOT109-1 (SO16) 74HC137 Product data sheet 9 Y6 aaa-033060 Fig. 6. Pin configuration SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 3 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 5.2. Pin description Table 2. Pin description Symbol Pin Description A0 1 data input 0 A1 2 data input 1 A2 3 data input 2 LE 4 latch enable input (active LOW) E1 5 data enable input 1 (active LOW) E2 6 data enable input 2 (active HIGH) Y7 7 multiplexer output 7 GND 8 ground (0 V) Y6 9 multiplexer output 6 Y5 10 multiplexer output 5 Y4 11 multiplexer output 4 Y3 12 multiplexer output 3 Y2 13 multiplexer output 2 Y1 14 multiplexer output 1 Y0 15 multiplexer output 0 VCC 16 positive supply voltage 6. Function table Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Enable Input Output LE E1 E2 A0 A1 A2 Y0 H L H X X X stable X H X X X X X X L X X L L H L H 74HC137 Product data sheet Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H H H H X H H H H H H H H L L L H H H H H H H L L H L H H H H H H L H L H H L H H H H H H H L H H H L H H H H L L H H H H H L H H H H L H H H H H H L H H L H H H H H H H H L H H H H H H H H H H H L All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 4 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +7 V VCC supply voltage IIK input diode current VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA IOK output diode current VO < -0.5 V or VO > VCC + 0.5 V - ±20 mA IO output source or sink current VO = -0.5 V to VCC + 0.5 V - ±25 mA ICC supply current - 50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot power dissipation - 500 mW [1] SO16 and SSOP16 packages [1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Δt/ΔV input transition rise and fall rate Tamb Conditions Product data sheet Typ Max Unit 2.0 5.0 6.0 V 0 - VCC V 0 - VCC V VCC = 2.0 V - - 625 ns/V VCC = 4.5 V - 1.67 139 ns/V VCC = 6.0 V - - 83 ns/V -40 - +125 ambient temperature 74HC137 Min All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © °C Nexperia B.V. 2021. All rights reserved 5 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage Conditions Tamb = 25 °C Tamb = -40 °C to +85 °C Min Typ Max Min Max VCC = 2.0 V 1.5 1.2 VCC = 4.5 V 3.15 2.4 - 1.5 - 3.15 VCC = 6.0 V 4.2 3.2 - VCC = 2.0 V - 0.8 VCC = 4.5 V - Tamb = -40 °C Unit to +125 °C Min Max - 1.5 - V - 3.15 - V 4.2 - 4.2 - V 0.5 - 0.5 - 0.5 V 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V VI = VIH or VIL HIGH-level output voltage IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = -4 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = -5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V VI = VIH or VIL LOW-level output voltage IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V - - ±0.1 - ±1.0 - ±1.0 μA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 μA CI input capacitance - 3.5 - - - - - pF 74HC137 Product data sheet VI = VCC or GND; VCC = 6.0 V All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 6 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; For test circuit see Fig. 10 Symbol Parameter tpd propagation delay Conditions Tamb = 25 °C Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 58 180 - 225 - 270 ns VCC = 4.5 V - 21 36 - 45 - 54 ns VCC = 6.0 V - 17 31 - 38 - 46 ns VCC = 5.0 V; CL = 15 pF - 18 - - - - - ns VCC = 2.0 V - 55 190 - 240 - 285 ns VCC = 4.5 V - 20 38 - 48 - 57 ns VCC = 6.0 V - 16 32 - 41 - 48 ns VCC = 5.0 V; CL = 15 pF - 17 - - - - - ns VCC = 2.0 V - 50 145 - 180 - 220 ns VCC = 4.5 V - 18 29 - 36 - 44 ns VCC = 6.0 V - 14 25 - 31 - 38 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 2.0 V - 50 145 - 180 - 220 ns VCC = 4.5 V - 18 29 - 36 - 44 ns VCC = 6.0 V - 14 25 - 31 - 38 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 50 11 - 65 - 75 - ns VCC = 4.5 V 10 4 - 13 - 15 - ns VCC = 6.0 V 9 3 - 11 - 13 - ns VCC = 2.0 V 50 3 - 65 - 75 - ns VCC = 4.5 V 10 1 - 13 - 15 - ns VCC = 6.0 V 9 1 - 11 - 13 - ns VCC = 2.0 V 30 3 - 40 - 45 - ns VCC = 4.5 V 6 1 - 8 - 9 - ns VCC = 6.0 V 5 1 - 7 - 8 - ns An to Yn; see Fig. 7 [1] LE to Yn; see Fig. 8 E1 to Yn; see Fig. 8 E2 to Yn; see Fig. 7 tt tW tsu th transition time pulse width set-up time hold time 74HC137 Product data sheet see Fig. 7 [2] LE HIGH; see Fig. 9 An to LE; see Fig. 9 An to LE; see Fig. 9 All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 7 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting Symbol Parameter CPD [1] [2] [3] power dissipation capacitance Conditions Tamb = 25 °C VI = GND to VCC [3] Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Min Typ Max Min Max Min Max - 57 - - - - - Unit pF tpd is the same as tPHL, tPLH. tt is the same as tTHL and tTLH. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + ∑(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 ∑(CL × VCC × fo) = sum of outputs. 10.1. Waveforms and test circuit An, E2 input VM tPHL Yn output tPLH VM tTHL tTLH 001aab883 VM = 0.5 × VI. Fig. 7. Waveforms showing the address input (An) and enable input (E2) to output (Yn) propagation delays and the output transition times E1, LE input VM tPHL Yn output tPLH VM tTHL tTLH 001aab884 VM = 0.5 × VI. Fig. 8. Waveforms showing the enable input (E1, LE) to output (Yn) propagation delays and the output transition times 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 8 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting An input VM th tsu LE input transparant th tsu VM latched transparant latched tW 001aab875 The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5 × VI. Fig. 9. Waveforms showing the data set-up, hold times for An input to LE input and the latch enable pulse width VCC PULSE GENERATOR VI DUT VO RT CL mna101 Test data is given in Table 8. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Fig. 10. Test circuit for measuring switching times Table 8. Test data Supply Input VCC VI tr, tf CL 2.0 V VCC 6 ns 50 pF 4.5 V VCC 6 ns 50 pF 6.0 V VCC 6 ns 50 pF 5.0 V VCC 6 ns 15 pF 74HC137 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 9 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 11. Application information strobe decoder enable X0 X1 X2 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 input address 0 1 2 3 4 5 6 7 to five other decoders X3 X4 X5 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 0 1 2 3 4 outputs 5 6 7 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 8 9 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 10 11 12 13 14 15 outputs 16 17 18 19 20 21 22 23 outputs 001aab885 Fig. 11. 6-to-64 line decoder with input address storage 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 10 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 12. Package outline SOT109-1 (SO16) 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 11 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig. 13. Package outline SOT338-1 (SSOP16) 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 12 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 14. Package outline SOT403-1 (TSSOP16) 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 13 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 13. Abbreviations Table 9. Abbreviations Acronym Abbreviation CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC137 v.5 20210804 Product data sheet - Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74HC137PW (SOT403-1/TSSOP16) added. Section 1 and Section 2 updated. Section 7: Derating values for Ptot total power dissipation updated. 74HC137 v.4 20151223 Modifications: • 74HC137 v.3 20041111 Modifications: • • • 74HC137 v.4 Product data sheet - 74HC137 v.3 Type number 74HC137N (SOT38-4) removed. Product data sheet - 74HC_HCT137_CNV v.2 The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. Removed type number 74HCT137. Inserted family specification. 74HC_HCT137_CNV v.2 19970827 Product specification - 74HC_HCT137 v.1 74HC_HCT137 v.1 19901201 Product specification - - 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 14 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 15 / 16 74HC137 Nexperia 3-to-8 line decoder, demultiplexer with address latches; inverting Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 4 6. Function table............................................................... 4 7. Limiting values............................................................. 5 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 10. Dynamic characteristics............................................ 7 10.1. Waveforms and test circuit........................................ 8 11. Application information............................................10 12. Package outline........................................................ 11 13. Abbreviations............................................................ 14 14. Revision history........................................................14 15. Legal information......................................................15 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 4 August 2021 74HC137 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 4 August 2021 © Nexperia B.V. 2021. All rights reserved 16 / 16