74HC299
8-bit universal shift register; 3-state
Rev. 5 — 17 January 2019
Product data sheet
1. General description
The 74HC299 is an 8-bit universal shift register with 3-state outputs. It contains eight edgetriggered D-type flip-flops and the interstage logic necessary to perform synchronous shift-right,
shift-left, parallel load and hold operations. The type of operation is determined by the mode select
inputs S0 and S1. Pins I/O0 to I/O7 are flip-flop 3-state buffer outputs which allow them to operate
as data inputs in parallel load mode. The serial outputs Q0 and Q7 are used for expansion in serial
shifting of longer words. A LOW signal on the asynchronous master reset input MR overrides
the Sn and clock CP inputs and resets the flip-flops. All other state changes are initiated by the
rising edge of the clock pulse. Inputs can change when the clock is either state, provided that the
recommended set-up and hold times are observed. A HIGH signal on the 3-state output enable
inputs OE1 or OE2 disables the 3-state buffers and the I/On outputs assume a high-impedance
OFF-state. In this condition, the shift, hold, load and reset operations can still occur. The 3-state
buffers are also disabled by HIGH signals on both S0 and S1, when in preparation for a parallel
load operation. Inputs include clamp diodes. This enables the use of current limiting resistors to
interface inputs to voltages in excess of VCC.
2. Features and benefits
•
•
•
•
•
•
•
•
CMOS input levels
Multiplexed inputs/outputs provide improved bit density
Four operating modes:
• Shift left
• Shift right
• Hold (store)
• Load data
Operates with output enable or at high-impedance OFF-state
3-state outputs drive bus lines directly
Cascadable for n-bit word lengths
ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC299D
-40 °C to +125 °C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74HC299DB
-40 °C to +125 °C
SSOP20
plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74HC299
Nexperia
8-bit universal shift register; 3-state
4. Functional diagram
1
11
12
9
8
2
3
19
S0
DSR
S1
DSL
18
CP
8-BIT SHIFT REGISTER
MR
Q7
Q0
OE1
17
INPUT/3-STATE OUTPUT CIRCUITRY
OE2
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7
7
Fig. 1.
13
6
14
5
15
4
16
001aai460
Functional diagram
9
2
3
1
19
12
1
S0
I/O0
7
19
S1
I/O1
13
11
DSR
I/O2
6
18
DSL
I/O3
14
I/O4
5
12
CP
I/O5
15
9
MR
I/O6
4
I/O7
16
Q0
8
Q7
17
2
3
OE
11
7
13
6
14
5
15
4
16
18
R
&
Logic symbol
74HC299
Product data sheet
3EN5
0
0
M
3
1
C4/1 /2
1, 4D
3, 4D
6, 5
8
Z6
3, 4D
5
3, 4D
7, 5
2, 4D
17
Z7
001aai459
001aai458
Fig. 2.
SRG8
Fig. 3.
IEC logic symbol
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Rev. 5 — 17 January 2019
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2 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
DSR
S0
D
S1
Q
CP
FF0
RD
I/O0
CP
Q0
D
OE1
Q
CP
FF1
RD
OE2
D
Q
CP
FF2
RD
D
Q
CP
FF3
RD
D
Q
CP
FF4
RD
D
Q
CP
FF5
RD
D
Q
CP
FF6
RD
DSL
D
Q
CP
FF7
RD
Q7
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
001aai461
MR
Fig. 4.
I/O1
Logic diagram
74HC299
Product data sheet
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Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
3 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
5. Pinning information
5.1. Pinning
74HC299
S0
1
20 VCC
OE1
2
19 S1
OE2
3
18 DSL
I/O6
4
17 Q7
I/O4
5
16 I/O7
I/O2
6
15 I/O5
I/O0
7
14 I/O3
Q0
8
13 I/O1
MR
9
12 CP
GND 10
11 DSR
001aai511
Fig. 5.
Pin configuration SOT163-1 (SO20) and SOT339-1 (SSOP20)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
S0, S1
1, 19
mode select input
OE1, OE2
2, 3
3-state output enable input (active LOW)
I/O0, I/O1, I/O2, I/O3, I/O4, I/O5, I/O6, I/O7
7, 13, 6, 14, 5,
15, 4, 16
parallel data input or 3-state parallel output (bus driver)
Q0, Q7
8, 17
serial output (standard output)
MR
9
asynchronous master reset input (active LOW)
GND
10
ground (0 V)
DSR
11
serial data shift-right input
CP
12
clock input (LOW to HIGH, edge-triggered)
DSL
18
serial data shift-left input
VCC
20
positive supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW to HIGH CP transition; X = don’t care.
Input
Response
MR
S1
S0
CP
L
X
X
X
asynchronous reset; Q0 to Q7 = LOW
H
H
H
↑
parallel load; I/On → Qn
H
L
H
↑
shift right; DSR → Q0, Q0 → Q1, etc.
H
H
L
↑
shift left; DSL → Q7, Q7 → Q6, etc.
H
L
L
X
hold
74HC299
Product data sheet
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Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
4 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
VI < -0.5 V or VI > VCC + 0.5 V
IOK
output clamping current
VO < -0.5 V or VO > VCC + 0.5 V
IO
output current
-0.5 V < VO < VCC + 0.5 V
ICC
supply current
IGND
ground current
Tstg
storage temperature
Ptot
total power dissipation
[1]
[2]
[3]
Conditions
Min
Max
Unit
-0.5
+7
V
[1]
-
±20
mA
[1]
-
±20
mA
standard outputs
-
±25
mA
bus driver outputs
-
±35
mA
standard outputs
-
50
mA
bus driver outputs
-
70
mA
standard outputs
-50
-
mA
bus driver outputs
-70
-
mA
-65
+150
°C
Tamb = -40 °C to +125 °C
SO20 package
[2]
-
500
mW
SSOP20 package
[3]
-
500
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Ptot derates linearly at 8 mW/K above 70 °C.
Ptot derates linearly at 5.5 mW/K above 60 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
74HC299
Product data sheet
Conditions
Min
Typ
Max
Unit
2.0
5.0
6.0
V
0
-
VCC
V
0
-
VCC
V
-40
-
+125
°C
VCC = 2.0 V
-
-
625
ns/V
VCC = 4.5 V
-
1.67
139
ns/V
VCC = 6.0 V
-
-
83
ns/V
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
5 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VIH
VIL
VOH
HIGH-level input
voltage
LOW-level input
voltage
Conditions
25 °C
-40 °C to
+85 °C
Min
Typ
Max
Min
Max
VCC = 2.0 V
1.5
1.2
VCC = 4.5 V
3.15
2.4
-
1.5
-
3.15
VCC = 6.0 V
4.2
3.2
-
VCC = 2.0 V
-
0.8
VCC = 4.5 V
-
VCC = 6.0 V
-40 °C to
+125 °C
Unit
Min
Max
-
1.5
-
V
-
3.15
-
V
4.2
-
4.2
-
V
0.5
-
0.5
-
0.5
V
2.1
1.35
-
1.35
-
1.35 V
-
2.8
1.8
-
1.8
-
1.8
V
IO = -20 μA; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = -20 μA; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = -20 μA; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = -4.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = -5.2 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = -6.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = -7.8 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = 20 μA; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 μA; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 μA; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 5.2 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
IO = 6.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 7.8 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
-
-
±0.1
-
±1.0
-
±1.0 μA
±10.0 μA
HIGH-level output VI = VIH or VIL
voltage
all outputs
standard outputs
bus driver outputs
VOL
LOW-level output VI = VIH or VIL
voltage
all outputs
standard outputs
bus driver outputs
II
input leakage
current
IOZ
OFF-state output VI = VIH or VIL; VCC = 6.0 V;
current
VO = VCC or GND
-
-
±0.5
-
±5.0
-
ICC
supply current
-
-
8.0
-
80
-
160
μA
CI
input capacitance
-
3.5
-
-
-
-
-
pF
CI/O
input/output
capacitance
-
10
-
-
-
-
-
pF
74HC299
Product data sheet
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
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Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
6 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
Symbol Parameter
CPD
[1]
Conditions
25 °C
power dissipation VI = GND to VCC
capacitance
[1]
-40 °C to
+85 °C
-40 °C to
+125 °C
Min
Typ
Max
Min
Max
Min
Max
-
120
-
-
-
-
-
Unit
pF
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD x VCC x fi + ∑(CL x VCC x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
2
∑(CL x VCC x fo) = sum of outputs.
CL = output load capacitance in pF;
VCC = supply voltage in V.
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND (ground = 0 V); for test circuit, see Fig. 10.
Symbol Parameter
Conditions
tpd
CP to Q0, Q7; see Fig. 6
propagation delay
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
-
66
200
-
250
-
300 ns
VCC = 4.5 V
-
24
40
-
50
-
60
ns
VCC = 5.0 V; CL = 15 pF
-
20
-
-
-
-
-
ns
VCC = 6.0 V
-
19
34
-
43
-
51
ns
VCC = 2.0 V
-
66
200
-
250
-
300 ns
VCC = 4.5 V
-
24
40
-
50
-
60
ns
VCC = 5.0 V; CL = 15 pF
-
20
-
-
-
-
-
ns
-
19
34
-
43
-
51
ns
VCC = 2.0 V
-
66
200
-
250
-
300 ns
VCC = 4.5 V
-
24
40
-
50
-
60
ns
VCC = 5.0 V; CL = 15 pF
-
20
-
-
-
-
-
ns
VCC = 6.0 V
-
19
34
-
43
-
51
ns
VCC = 2.0 V
-
14
60
-
75
-
90
ns
VCC = 4.5 V
-
5
12
-
15
-
18
ns
VCC = 6.0 V
-
4
10
-
13
-
15
ns
VCC = 2.0 V
-
19
75
-
95
-
110 ns
VCC = 4.5 V
-
7
15
-
19
-
22
ns
VCC = 6.0 V
-
6
13
-
16
-
19
ns
[1]
CP to I/On; see Fig. 6
VCC = 6.0 V
MR to Q0, Q7 or I/On;
see Fig. 7
tt
transition time
bus driver (I/On); see Fig. 6
[2]
[3]
standard (Q0, Q7); see Fig. 6
74HC299
Product data sheet
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Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
7 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
Symbol Parameter
tW
pulse width
Conditions
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
80
17
-
100
-
120
-
ns
VCC = 4.5 V
16
6
-
20
-
24
-
ns
VCC = 6.0 V
14
5
-
17
-
20
-
ns
VCC = 2.0 V
80
19
-
100
-
120
-
ns
VCC = 4.5 V
16
7
-
20
-
24
-
ns
VCC = 6.0 V
14
6
-
17
-
20
-
ns
VCC = 2.0 V
-
50
155
-
195
-
235 ns
VCC = 4.5 V
-
18
31
-
39
-
47
ns
VCC = 6.0 V
-
14
26
-
33
-
40
ns
VCC = 2.0 V
-
41
130
-
165
-
195 ns
VCC = 4.5 V
-
15
26
-
33
-
39
ns
-
12
22
-
28
-
33
ns
VCC = 2.0 V
-
66
185
-
230
-
280 ns
VCC = 4.5 V
-
24
37
-
46
-
56
ns
VCC = 6.0 V
-
19
31
-
39
-
48
ns
VCC = 2.0 V
-
55
155
-
195
-
235 ns
VCC = 4.5 V
-
20
31
-
39
-
47
ns
VCC = 6.0 V
-
16
26
-
33
-
40
ns
VCC = 2.0 V
5
-14
-
5
-
5
-
ns
VCC = 4.5 V
5
-5
-
5
-
5
-
ns
VCC = 6.0 V
5
-4
-
5
-
5
-
ns
VCC = 2.0 V
100
33
-
125
-
150
-
ns
VCC = 4.5 V
20
12
-
25
-
30
-
ns
VCC = 6.0 V
17
10
-
21
-
26
-
ns
VCC = 2.0 V
100
33
-
125
-
150
-
ns
VCC = 4.5 V
20
12
-
25
-
30
-
ns
VCC = 6.0 V
17
10
-
21
-
26
-
ns
VCC = 2.0 V
125
39
-
155
-
190
-
ns
VCC = 4.5 V
25
14
-
31
-
38
-
ns
VCC = 6.0 V
21
11
-
26
-
32
-
ns
CP HIGH or LOW; see Fig. 6
MR LOW; see Fig. 7
tPZH
tPZL
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
OEn to I/On; see Fig. 9
[4]
OEn to I/On; see Fig. 9
VCC = 6.0 V
tPHZ
tPLZ
trec
tsu
HIGH to OFF-state
propagation delay
LOW to OFF-state
propagation delay
recovery time
set-up time
OEn to I/On; see Fig. 9
[5]
OEn to I/On; see Fig. 9
MR to CP; see Fig. 7
DSR, DSL to CP; see Fig. 6
S0, S1 to CP; see Fig. 8
I/On to CP; see Fig. 6
74HC299
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 January 2019
©
Nexperia B.V. 2019. All rights reserved
8 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
Symbol Parameter
th
hold time
Conditions
25 °C
-40 °C to
+85 °C
-40 °C to
+125 °C
Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
0
-14
-
0
-
0
-
ns
VCC = 4.5 V
0
-5
-
0
-
0
-
ns
VCC = 6.0 V
0
-4
-
0
-
0
-
ns
VCC = 2.0 V
0
-28
-
0
-
0
-
ns
VCC = 4.5 V
0
-10
-
0
-
0
-
ns
VCC = 6.0 V
0
-8
-
0
-
0
-
ns
VCC = 2.0 V
5.0
15
-
4.0
-
3.4
-
MHz
VCC = 4.5 V
25
45
-
20
-
17
-
MHz
-
50
-
-
-
-
-
MHz
29
54
-
24
-
20
-
MHz
I/On, DSR, DSL to CP;
see Fig. 6
S0, S1 to CP; see Fig. 8
maximum frequency CP input; see Fig. 6
fmax
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
[1]
[2]
[3]
[4]
[5]
tpd is the same as tPHL and tPLH.
tpd is the same as tPHL.
tt is the same as tTHL and tTLH.
ten is the same as tPZH and tPZL.
tdis is the same as tPHZ and tPLZ.
10.1. Waveforms and test circuit
VI
I/On, DSR, DSL
inputs
VM
GND
th
th
tsu
tsu
1/fmax
VI
CP input
VM
GND
tW
tPHL
tPLH
VOH
I/On, Q0, Q7
outputs
VM
VOL
tTHL
tTLH
001aai462
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 6.
Clock pulse to outputs I/On, Q0, Q7 propagation delays, the clock pulse width, the I/On, DSR and DSL to
clock pulse set-up and hold times, the output transition times and the maximum clock frequency
74HC299
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 January 2019
©
Nexperia B.V. 2019. All rights reserved
9 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
VI
MR input
VM
GND
tW
trec
VI
VM
CP input
GND
tPHL
VOH
I/On, Q0, Q7
outputs
VOL
VM
001aai463
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 7.
The master reset pulse width (LOW), the master reset to outputs I/On, Q0, Q7 propagation delays and the
master reset to clock pulse removal time
VI
I/On, DSR, DSL, Sn
inputs
VM
GND
tsu
th
tsu
th
VI
CP input
VM
GND
001aai464
Measurement points are given in Table 8.
Fig. 8.
Set-up and hold times from the mode control inputs S0, S1 to the clock pulse
tr
VI
OEn input
tf
90 %
VM
GND 10 %
tPLZ
VOH
I/On output
LOW to OFF
OFF to LOW
VOL
tPZL
VM
10 %
tPZH
tPHZ
VOH
I/On output
HIGH to OFF
OFF to HIGH
VOL
90 %
VM
outputs
enabled
outputs
disabled
outputs
enabled
001aai465
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 9.
3-state enable and disable times for OEn inputs
74HC299
Product data sheet
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74HC299
Nexperia
8-bit universal shift register; 3-state
Table 8. Measurement points
Input
Output
VI
VM
VM
VCC
0.5VCC
0.5VCC
VI
negative
pulse
tW
90 %
VM
0V
VI
positive
pulse
0V
VM
10 %
tf
tr
tr
tf
90 %
VM
VM
10 %
tW
VCC
G
VI
DUT
VCC
VO
RT
RL
S1
open
CL
001aad983
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig. 10. Test circuit for measuring switching times
Table 9. Test data
Input
S1 position
Load
VI
tr, tf
CL
RL
tPHL, tPLH
VCC
6 ns
15 pF, 50 pF
1 kΩ
open
74HC299
Product data sheet
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74HC299
Nexperia
8-bit universal shift register; 3-state
11. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
HE
v M A
Z
20
11
Q
A2
A
(A 3 )
A1
pin 1 index
θ
Lp
L
1
10
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig. 11. Package outline SOT163-1 (SO20)
74HC299
Product data sheet
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Rev. 5 — 17 January 2019
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Nexperia B.V. 2019. All rights reserved
12 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
D
SOT339-1
E
A
X
c
HE
y
v M A
Z
20
11
Q
A2
pin 1 index
A
(A 3)
A1
θ
Lp
L
1
10
bp
e
detail X
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
0.9
0.5
8o
0o
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT339-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-150
Fig. 12. Package outline SOT339-1 (SSOP20)
74HC299
Product data sheet
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Rev. 5 — 17 January 2019
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13 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
13. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC299 v.5
20190117
Product data sheet
-
74HC299 v.4
Modifications:
•
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Type number 74HC299PW (SOT360-1) removed.
74HC299 v.4
20160226
Modifications:
•
•
•
•
74HC_HCT299 v.3
20080728
Modifications:
•
•
•
•
•
•
74HC_HCT299_CNV v.2
74HC299
Product data sheet
Product data sheet
-
74HC_HCT299 v.3
Type numbers 74HC299N and 74HCT299N (SOT146-1) removed.
Type number 74HCT299D (SOT163-1) removed.
Type number 74HCT299DB (SOT339-1) removed.
Type number 74HCT299PW (SOT360-1) removed.
Product data sheet
-
74HC_HCT299_CNV_2
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Section 3: Ordering information added
Section 12: Package outline drawings added
Section 9 "Static characteristics": Family data added
Section 11 "Waveforms": Test circuit added
19970828
Product specification
-
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 January 2019
-
©
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14 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
14. Legal information
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
74HC299
Product data sheet
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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15 / 16
74HC299
Nexperia
8-bit universal shift register; 3-state
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................4
5.1. Pinning.........................................................................4
5.2. Pin description............................................................. 4
6. Functional description................................................. 4
7. Limiting values............................................................. 5
8. Recommended operating conditions..........................5
9. Static characteristics....................................................6
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 9
11. Package outline........................................................ 12
12. Abbreviations............................................................ 14
13. Revision history........................................................14
14. Legal information......................................................15
©
Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 17 January 2019
74HC299
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 January 2019
©
Nexperia B.V. 2019. All rights reserved
16 / 16
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