CLVC2G125IDCTRQ1

SN74LVC2G125-Q1 SCES559C – MARCH 2004 – REVISED MARCH 2011 www.ti.com DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS Check for Samples: SN74LVC2G125-Q1 FEATURES 1 • • • • • • • • Qualified for Automotive Applications Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4.3 ns at 3.3 V Low Power Consumption, 10-μA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial-Power-Down Mode Operation • • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II DCT OR DCU PACKAGE (TOP VIEW) 1OE 1A 2Y GND 1 8 2 7 3 6 4 5 VCC 2OE 1Y 2A DESCRIPTION/ORDERING INFORMATION The SN74LVC2G125-Q1 is a dual bus buffer gate designed for 1.65-V to 5.5-V VCC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION (1) TA –40°C to 85°C (1) (2) (3) PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING (3) SSOP – DCT Tape and reel CLVC2G125IDCTRQ1 C25_ _ _ VSSOP – DCU Tape and reel CLVC2G125IDCURQ1 CCW_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. FUNCTION TABLE (EACH BUFFER) INPUTS OE A OUTPUT Y L H H L L L H X Z 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2011, Texas Instruments Incorporated SN74LVC2G125-Q1 SCES559C – MARCH 2004 – REVISED MARCH 2011 www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) 1 1OE 1A 2 6 1Y 7 2OE 5 3 2A 2Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.5 (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off state VO Voltage range applied to any output in the high or low state (2) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA (3) Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) 2 DCT package 220 DCU package 227 –65 150 V °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2004–2011, Texas Instruments Incorporated Product Folder Link(s): SN74LVC2G125-Q1 SN74LVC2G125-Q1 SCES559C – MARCH 2004 – REVISED MARCH 2011 www.ti.com Recommended Operating Conditions (1) VCC Operating Supply voltage Data retention only 5.5 1.7 VCC = 3 V to 3.6 V 0.7 × VCC 0.35 × VCC VCC = 1.65 V to 1.95 V Low-level input voltage VI Input voltage VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 Output voltage 0 5.5 High or low state 0 VCC 3-state 0 5.5 –16 VCC = 3 V –32 VCC = 1.65 V 4 VCC = 2.3 V Low-level output current Δt/Δv 8 16 VCC = 3 V Input transition rise or fall rate VCC = 4.5 V 32 VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 (1) ns/V 5 –40 Operating free-air temperature mA 24 VCC = 5 V ± 0.5 V TA mA –24 VCC = 4.5 V IOL V –8 VCC = 2.3 V High-level output current V –4 VCC = 1.65 V IOH V 0.3 × VCC VCC = 4.5 V to 5.5 V VO V V 2 VCC = 4.5 V to 5.5 V VIL UNIT 0.65 × VCC VCC = 2.3 V to 2.7 V High-level input voltage MAX 1.5 VCC = 1.65 V to 1.95 V VIH MIN 1.65 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Copyright © 2004–2011, Texas Instruments Incorporated Product Folder Link(s): SN74LVC2G125-Q1 Submit Documentation Feedback 3 SN74LVC2G125-Q1 SCES559C – MARCH 2004 – REVISED MARCH 2011 www.ti.com Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 μA VOH 1.65 V 1.2 IOH = –8 mA 2.3 V 1.9 4.5 V IOL = 100 μA 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 32 mA VI = 5.5 V or GND VI or VO = 5.5 V IOZ VO = 0 to 5.5 V ICC VI = 5.5 V or GND, IO = 0 ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND Data inputs Control inputs Co (1) 0.4 V 0.55 4.5 V Ioff Ci 3.8 3V IOL = 24 mA A or OE inputs 2.3 IOH = –32 mA IOL = 16 mA II V 2.4 3V IOH = –24 mA UNIT VCC – 0.1 1.65 V to 5.5 V IOH = –4 mA IOH = –16 mA VOL MIN TYP (1) MAX VCC 0.55 0 to 5.5 V ±5 μA 0 ±10 μA 3.6 V 10 μA 1.65 V to 5.5 V 10 μA 3 V to 5.5 V 500 μA VI = VCC or GND 3.3 V VO = VCC or GND 3.3 V 3.5 pF 4 6.5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A ten OE tdis OE PARAMETER VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX Y 3.3 9.1 1.5 4.8 1.4 Y 4 9.9 1.9 5.6 1.2 Y 1.5 11.6 1 5.8 1.4 VCC = 5 V ± 0.5 V UNIT MIN MAX 4.3 1 3.7 ns 4.7 1.2 3.8 ns 4.6 1 3.4 ns Operating Characteristics TA = 25° TEST CONDITIONS PARAMETER Cpd 4 Power dissipation capacitance Outputs enabled Outputs disabled Submit Documentation Feedback f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 19 19 20 22 2 2 2 3 UNIT pF Copyright © 2004–2011, Texas Instruments Incorporated Product Folder Link(s): SN74LVC2G125-Q1 SN74LVC2G125-Q1 SCES559C – MARCH 2004 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V VOH VM Output VM VOL VM 0V VLOAD/2 VM tPZH VOH Output VM tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPHL VM tPZL tPHL tPLH VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VM VOH – V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Copyright © 2004–2011, Texas Instruments Incorporated Product Folder Link(s): SN74LVC2G125-Q1 Submit Documentation Feedback 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CLVC2G125IDCTRQ1 ACTIVE SM8 DCT 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 C25 Z CLVC2G125IDCURQ1 ACTIVE VSSOP DCU 8 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CCWR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of