SN74LVC2G17-Q1
www.ti.com.................................................................................................................................................... SCES618B – OCTOBER 2004 – REVISED APRIL 2008
DUAL SCHMITT-TRIGGER BUFFER
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 5.4 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce)
2 V at VCC = 3.3 V, TA = 25°C
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
1A
1
DCK PACKAGE
(TOP VIEW)
6
1Y
GND
2
5
VCC
2A
3
4
2Y
1A
1
6
1Y
GND
2
5
VCC
2A
3
4
2Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G17 contains two buffers and performs the Boolean function Y = A. The device functions as two
independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going
(VT+) and negative-going (VT–) signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION (1)
TA
–40°C to 125°C
(1)
(2)
(3)
PACKAGE (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING (3)
SOT (SOT-23) – DBV
Reel of 3000
SN74LVC2G17QDBVRQ1
C17_
SOT (SC-70) – DCK
Reel of 3000
SN74LVC2G17QDCKRQ1
C7_
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site. Pin 1 identifier
indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
OUTPUT
Y
H
H
L
L
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2008, Texas Instruments Incorporated
SN74LVC2G17-Q1
SCES618B – OCTOBER 2004 – REVISED APRIL 2008.................................................................................................................................................... www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
1A
2A
1
6
3
4
1Y
2Y
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range (2)
–0.5
6.5
V
–0.5
6.5
V
–0.5
VCC + 0.5
(2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off state
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through VCC or GND
θJA
Package thermal impedance (4)
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
DBV package
165
DCK package
259
–65
V
°C/W
°C
150
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions (1)
VCC
Supply voltage
VI
Input voltage
VO
Output voltage
Operating
MIN
MAX
1.65
5.5
V
0
5.5
V
0
VCC
V
VCC = 1.65 V
–4
VCC = 2.3 V
IOH
High-level output current
–8
–16
VCC = 3 V
–32
VCC = 1.65 V
4
VCC = 2.3 V
Low-level output current
8
16
VCC = 3 V
(1)
2
Operating free-air temperature
mA
24
VCC = 4.5 V
TA
mA
–24
VCC = 4.5 V
IOL
UNIT
32
–40
125
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G17-Q1
SN74LVC2G17-Q1
www.ti.com.................................................................................................................................................... SCES618B – OCTOBER 2004 – REVISED APRIL 2008
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT+
Positive-going input
threshold voltage
VT–
Negative-going input
threshold voltage
ΔVT
Hysteresis
(VT+ – VT–)
IOH = –100 µA
VOH
1
1.7
3V
1.3
2.2
4.5 V
1.9
3.1
5.5 V
2.2
3.7
1.65 V
0.3
0.7
2.3 V
0.4
1
3V
0.6
1.3
4.5 V
1.1
2
5.5 V
1.4
2.5
1.65 V
0.3
0.8
2.3 V
0.4
0.9
3V
0.4
1.1
4.5 V
0.6
1.3
5.5 V
0.7
1.4
1.2
1.9
4.5 V
IOL = 100 µA
1.65 V to 5.5 V
0.1
IOL = 4 mA
1.65 V
0.45
IOL = 8 mA
2.3 V
0.3
0.4
VI or VO = 5.5 V
VI = 5.5 V or GND,
IO = 0
ΔICC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
V
0.55
4.5 V
ICC
V
3.8
3V
Ioff
V
2.3
IOH = –32 mA
VI = 5.5 V or GND
V
V
2.4
3V
UNIT
VCC – 0.1
2.3 V
IOL = 32 mA
(1)
2.3 V
IOH = –8 mA
IOL = 24 mA
A input
1.4
1.65 V
IOL = 16 mA
II
0.7
1.65 V to 5.5 V
IOH = –24 mA
MAX
1.65 V
IOH = –4 mA
IOH = –16 mA
VOL
MIN TYP (1)
VCC
0.55
0 to 5.5 V
±5
µA
0
±10
µA
1.65 V to 5.5 V
10
µA
3 V to 5.5 V
500
µA
3.3 V
4
pF
All typical values are at VCC = 3.3 V, TA = 25°C.
Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G17-Q1
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3
SN74LVC2G17-Q1
SCES618B – OCTOBER 2004 – REVISED APRIL 2008.................................................................................................................................................... www.ti.com
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.9
9.3
1.9
5.7
2.2
5.4
1.5
4.3
UNIT
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
4
Power dissipation capacitance
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TEST CONDITIONS
f = 10 MHz
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
TYP
TYP
TYP
TYP
17
18
19
21
UNIT
pF
Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G17-Q1
SN74LVC2G17-Q1
www.ti.com.................................................................................................................................................... SCES618B – OCTOBER 2004 – REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
VLOAD
S1
RL
From Output
Under Test
Open
TEST
GND
CL
(see Note A)
S1
Open
VLOAD
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
RL
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
£2 ns
£2 ns
£2.5 ns
£2.5 ns
VM
VLOAD
CL
RL
VD
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kW
500 W
500 W
500 W
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tW
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VOH
VM
VOL
tPHL
VM
VM
0V
tPLZ
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VLOAD/2
VM
tPZH
VOH
Output
VM
tPZL
tPHL
VM
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VD
VOL
tPHZ
VM
VOH – VD
VOH
»0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC2G17-Q1
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5
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74LVC2G17QDCKRQ1
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(C7J, C7O)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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