TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
D
D
D
D
D
D
DW PACKAGE
(TOP VIEW)
Single-Supply Operation With Rail-to-Rail
Inputs
VOL = 0.000 V While Sinking 25 mA
Wide VCC Range . . . 3.5 V to 15 V
SCOUT Supplies up to 100 mA for External
Loads
Shutdown Mode
External 2.5-V Voltage Reference Available
1OUT
1IN –
1IN +
VCC –
SCOUT
SCREF
OSC
SCIN
description
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC +
2OUT
2IN –
2IN +
CAP –
GND
CAP +
FB/SD
The TLE2662 offers the advantages of JFET-input
operational amplifiers and rail-to-rail commonmode input voltage range with the convenience of single-supply operation. By combining a switched-capacitor
voltage converter with a dual operational amplifier in a single package, Texas Instruments now gives circuit
designers new options for conditioning low-level signals in single-supply systems.
The TLE2662 features two low power, high-output drive JFET-input operational amplifiers with a switchedcapacitor building block. Using two external capacitors, the switched-capacitor network can be configured as
a voltage inverter, generating a negative supply voltage capable of sourcing up to 100 mA. This supply functions
not only as the amplifier negative rail but is also available to drive external circuitry. In this configuration, the
amplifier common-mode input voltage range extends from the positive rail to below ground, providing true
rail-to-rail inputs from a single supply. Furthermore, the outputs can swing to and below ground while sinking
over 25 mA. This feature was previously unavailable in operational amplifier circuits. The TLE2662 operational
amplifier section has output stages that can drive 100-Ω loads to 2.5 V from a 5-V rail. With a 10-kΩ load, the
output swing extends to 3.5 V and can include the positive rail with a pullup resistor.
This operational amplifier offers the high slew rate, wide bandwidth, and high input impedance commonly
associated with JFET-input amplifiers, making the TLE2662 operational amplifier section suited for amplifying
fast signals without loading the signal source. When not sourcing or sinking current into a load, the amplifier
consumes only microamperes of supply current, thereby reducing the drain on and extending the life of the
power supply.
The TLE2662 features a shutdown pin (FB/SD), which can be used to disable the switched capacitor section.
When disabled, the voltage converter block draws less than 150 µA from the power supply. This feature,
combined with the operational amplifier’s low quiescent current, makes the TLE2662 a real power saver in the
standby mode.
The switched-capacitor building block also provides an on-board regulator; with the addition of an external
divider, a well-regulated output voltage is easily obtained. Additional filtering can be added to minimize switching
noise. The internal oscillator runs at a nominal frequency of 25 kHz. This can be synchronized to an external
clock signal or can be varied using an external capacitor. A 2.5-V reference is brought out to SCREF for use
with the on-board regulator or external circuitry.
The TLE2662 is characterized for operation over the industrial temperature range of – 40°C to 85°C. This device
is available in a 16-pin wide-body surface-mount package.
AVAILABLE OPTION
PACKAGE
TA
– 40°C to 85°C
SMALL OUTLINE
(DW)
TLE2662IDW
The DW package is available taped and reeled. Add
the suffix R to the device type (i.e., TLE2662IDWR).
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
functional block diagram
1OUT
1IN –
1IN +
VCC –
SCOUT
SCREF
OSC
SCIN
Amplifier Block
1
2
3
16
15
_
+
_
14
2OUT
2IN –
+
4
13
5
12
6
11
SwitchedCapacitor
Block
7
8
10
9
ACTUAL DEVICE COMPONENT COUNT
AMPLIFIER
BLOCK
Transistors
Resistors
Diodes
Capacitors
2
VCC +
SWITCHEDCAPACITOR BLOCK
42
9
3
2
POST OFFICE BOX 655303
Transistors
Resistors
Diodes
Capacitors
71
44
2
5
• DALLAS, TEXAS 75265
2IN +
CAP –
GND
CAP +
FB/SD
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, SCIN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
Supply voltage, VCC + (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
Supply voltage, VCC – (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 16 V
Differential input voltage, VID (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 V
Input voltage, VI (any input of amplifier) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC ±
FB/SD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to SCIN
OSC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to SCREF
Input current, II (each input of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1 mA
Output current, IO (each output of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA
Total current into VCC + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
Total current out of VCC – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
Duration of short-circuit current at (or below) TA = 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Junction temperature (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to the switched-capacitor block GND.
2. Voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC– .
3. Differential voltages are at IN+ with respect to IN –.
4. The output can be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
5. The devices are functional up to the absolute maximum junction temperature.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DW
1025 mW
8.2 mW/°C
656 mW
533 mW
recommended operating conditions
Supply voltage, VCC + / SCIN
Common mode input voltage,
Common-mode
voltage VIC
VCC ± = ± 5 V
VCC ± = ± 15 V
Operating free-air temperature, TA
Output current at SCOUT, IO
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MIN
MAX
3.5
15
UNIT
V
– 1.6
4
– 11
13
– 40
85
°C
0
100
mA
V
3
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
OPERATIONAL AMPLIFIER SECTION
electrical characteristics at specified free-air temperature, VCC ± = ±5 V (unless otherwise noted)
TEST CONDITIONS†
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
Input offset current
IIB
Input bias current
VICR
RS = 50 Ω
VIC = 0
0,
0.04
µV/mo
25°C
1
3
Full range
– 1.6
to
4
25°C
Full range
25°C
Full range
25°C
8V
VO = ± 2
2.8
V,
Large signal differential voltage amplification
Large-signal
RL = 10 kΩ
VO = 0 to 2 V
V,
RL = 100 Ω
VO = 0 to – 2 V
V,
RL = 100 Ω
ri
Input resistance
Ci
Input capacitance
zo
Open-loop output impedance
IO = 0
CMRR
Common mode rejection ratio
Common-mode
RS = 50 Ω,,
VIC = VICRmin
kSVR
Supply voltage rejection ratio (∆VCC ± /∆VIO)
Supply-voltage
VCC ± = ± 5 V to ± 15 V,,
RS = 50 Ω
ICC
Supply current
IL = 0
3.4
nA
V
V
3.7
V
3.1
2
– 3.4
– 3.9
–3
– 2.5
Full range
–2
25°C
15
Full range
–2
to
6
3
2.5
nA
pA
4
– 1.6
to
4
Full range
pA
2
25°C
25°C
IL = 20 mA
AVD
25°C
Common mode input voltage range
Common-mode
Maximum negative peak output voltage swing
mV
µV/°C
25°C
IL = 2 mA
5
UNIT
6
Full range
Maximum positive peak output voltage swing
MAX
6.3
Full range
IL = 20 mA
VOM –
TYP
1
Full range
IL = 2 mA
VOM +
MIN
Full range
Input offset voltage long-term drift (see Note 6)
IIO
TA‡
25°C
V
– 2.7
80
2
25°C
0.75
Full range
0.5
25°C
0.5
Full range
0.25
45
V/mV
3
1012
Ω
25°C
4
pF
25°C
560
Ω
25°C
25°C
65
Full range
65
25°C
75
Full range
65
25°C
Full range
82
dB
93
560
dB
620
640
µA
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
‡ Full range is – 40°C to 85°C.
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolated
to TA = 25 °C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
operating characteristics at specified free-air temperature, VCC± = ±5 V
TEST CONDITIONS†
PARAMETER
SR
Slew rate at unity gain (see Figure 1)
Vn
Equivalent input noise voltage (see Figure 2)
VN(PP)
In
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
THD
Total harmonic distortion
VO(PP) = 2 V,,
AVD = 2,
B1
Unity gain bandwidth (see Figure 3)
Unity-gain
ts
Settling time
BOM
Maximum output-swing bandwidth
φm
Phase margin at unity gain (see Figure 3)
TA‡
25°C
MIN
TYP
2.2
3.4
Full range
1.7
MAX
RL = 10 kΩ
kΩ,
CL = 100 pF
f = 10 Hz,
RS = 20 Ω
25°C
59
100
f = 1 kHz,
RS = 20 Ω
25°C
43
60
f = 0.1 Hz to 10 Hz
25°C
1.1
f = 1 kHz
25°C
1
f = 10 kHz,,
RL = 10 kΩ
25°C
0 025%
0.025%
RL = 10 kΩ,
CL = 100 pF
25°C
1.8
RL = 100 Ω,
CL = 100 pF
25°C
1.3
To 0.1%
25°C
5
To 0.01%
25°C
10
AVD = 1,
RL = 10 kΩ,
RL = 10 kΩ
25°C
140
CL = 100 pF
25°C
58°
RL = 100 Ω,
CL = 100 pF
25°C
75°
UNIT
V/µs
nV/√Hz
µV
fA /√Hz
MHz
µs
kHz
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
‡ Full range is – 40°C to 85°C.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted)
TEST CONDITIONS†
PARAMETER
VIO
Input offset voltage
αVIO
Temperature coefficient of input offset voltage
Input offset current
IIB
Input bias current
VICR
RS = 50 Ω
VIC = 0
0,
4
25°C
0.04
µV/mo
25°C
2
4
Full range
– 11
to
13
25°C
13.2
25°C
Full range
25°C
Full range
25°C
IL = 20 mA
Large signal differential voltage amplification
Large-signal
Full range
VO = ± 10 V
V,
RL = 10 kΩ
VO = 0 to 8 V
V,
RL = 600 Ω
VO = 0 to – 8 V
V,
RL = 600 Ω
– 12
to
16
nA
V
V
13.7
13
12.5
nA
pA
5
25°C
Full range
pA
3
– 11
to
13
Common mode input voltage range
Common-mode
Maximum negative peak output voltage swing
mV
µV/°C
25°C
Maximum positive peak output voltage swing
UNIT
6
Full range
IL = 2 mA
AVD
MAX
0.9
Full range
IL = 20 mA
VOM –
TYP
5.3
Full range
IL = 2 mA
VOM +
MIN
Full range
Input offset voltage long-term drift (see Note 6)
IIO
TA‡
25°C
V
13.2
12
– 13.2
– 13.7
– 13
– 12.5
V
– 13
– 12
25°C
30
Full range
20
25°C
25
Full range
10
25°C
3
Full range
1
230
100
V/mV
25
1012
Ω
25°C
4
pF
25°C
560
Ω
ri
Input resistance
25°C
Ci
Input capacitance
zo
Open-loop output impedance
IO = 0
CMRR
Common mode rejection ratio
Common-mode
RS = 50 Ω,,
VIC = VICRmin
25°C
72
Full range
65
kSVR
Supply voltage rejection ratio (∆VCC ± /∆VIO)
Supply-voltage
VCC ± = ± 5 V to ± 15 V,
RS = 50 Ω
25°C
75
Full range
65
ICC
Supply current
IL = 0
25°C
Full range
90
dB
93
625
dB
690
720
µA
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
‡ Full range is – 40°C to 85°C.
NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolated
to TA = 25 °C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
operating characteristics at specified free-air temperature, VCC± = ±15 V
TEST CONDITIONS†
PARAMETER
TA‡
25°C
MIN
TYP
2.6
3.4
Full range
2.1
MAX
UNIT
SR
Slew rate at unity gain (see Figure 1)
RL = 10 kΩ
kΩ,
CL = 100 pF
Vn
Equivalent
q
input noise voltage
g
(see Figure 2)
f = 10 Hz,
RS = 20 Ω
25°C
70
100
f = 1 kHz,
RS = 20 Ω
25°C
40
60
VN(PP)
Peak-to-peak equivalent input noise
voltage
f = 0.1 Hz to 10 Hz
25°C
1.1
µV
In
Equivalent input noise current
f = 1 kHz
25°C
1.1
fA /√Hz
THD
Total harmonic distortion
VO(PP) = 2 V,,
AVD = 2,
f = 10 kHz,,
RL = 10 kΩ
25°C
0 025%
0.025%
B1
Unity gain bandwidth (see Figure 3)
Unity-gain
RL = 10 kΩ,
CL = 100 pF
25°C
2
RL = 600 Ω,
CL = 100 pF
25°C
1.5
ts
Settling time
To 0.1%
25°C
5
To 0.01%
25°C
10
BOM
Maximum output-swing bandwidth
φm
Phase margin at unity gain (see Figure 3)
AVD = 1,
RL = 10 kΩ,
RL = 10 kΩ
25°C
40
CL = 100 pF
25°C
60°
RL = 600 Ω,
CL = 100 pF
25°C
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
‡ Full range is – 40°C to 85°C.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V/µs
nV/√Hz
MHz
µs
kHz
70°
7
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
SWITCHED-CAPACITOR SECTION
electrical characteristics over recommended supply voltage range and at specified free-air
temperature
TEST CONDITIONS†
PARAMETER
Regulated
g
output voltage,
g ,
SCOUT
Input regulation
Output regulation
RL(SCOUT) = 500 Ω
RL(SCOUT) = 500 Ω
RL(SCOUT) = 100 Ω to 500 Ω
Voltage
g loss,, SCIN – SCOUT
(see Note 9)
SCIN = 7 V,,
CIN = COUT = 100-µF tantalum
Output resistance
SCIN = 7 V,
See Note 10
SCIN = 7 V,
See Note 7
SCIN = 5 V,
See Note 8
SCIN = 7 V to 12 V,
See Note 7
SCIN = 5 V to 15 V,
See Note 8
SCIN = 7 V,
See Note 7
SCIN = 5 V,
See Note 8
IO = 10 mA
IO = 100 mA
∆IO = 10 mA to 100 mA,
Oscillator frequency
SCIN = 7 V,
V
Ireff = 60 µA
V
SCIN = 5 V,
Ireff = 50 µA
Maximum switch current
IO = 0
SCIN = 15 V
TYP
MAX
– 5.2
–5
– 4.7
UNIT
V
– 4.25
– 4 – 3.75
5
25
Full range
mV
27
10
50
Full range
mV
100
0.35
0.55
1.1
1.6
10
15
Ω
15
25
35
kHz
2.5
2.65
Full range
Full range
25°C
2.35
Full range
2.25
25°C
2.35
Full range
2.25
25°C
SCIN = 3.5 V
MIN
25°C
Full range
Reference voltage,
voltage Vreff
Supply current,
current IS
TA‡
Full range
2.75
2.5
2.65
2.75
300
V
V
V
mA
2.5
3.5
3
4.5
mA
Supply current in shutdown
V(FB/SD) = 0,
IO = 0,
SCIN = 5 V
Full range
100
150
µA
† Data applies for the switched-capacitor block only. Amplifier block is not connected.
‡ Full range is – 40°C to 85°C.
NOTES: 7. All regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator with
R1 = 20 kΩ, R2 = 102.5 kΩ, CIN = 10 µF (tantalum), COUT = 100 µF (tantalum) and C1 = 0.002 µF (see Figure 63).
8. All regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator with
R1 = 23.7 kΩ, R2 = 102.2 kΩ, CIN = 10 µF (tantalum), COUT = 100 µF (tantalum) and C1 = 0.002 µF (see Figure 63).
9. For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter, with SCREF, OSC, and FB/SD
unconnected. The voltage losses may be higher in other configurations.
10. Output resistance is defined as the slope of the curve (∆VO vs ∆IO) for output currents of 10 mA to 100 mA. This represents the linear
portion of the curve. The incremental slope of the curve is higher at currents less than 10 mA due to the characteristics of the switch
transistors.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
AMPLIFIER AND SWITCHED-CAPACITOR SECTIONS CONNECTED
electrical characteristics, VCC+ = 5 V, TA = 25°C (see Figure 4)
PARAMETER
TEST CONDITIONS
Maximum positive peak output voltage swing, VOM +
Maximum negative peak output voltage swing, VOM –
TYP
RL = 10 kΩ
3.7
RL = 600 Ω
3.5
RL = 100 Ω
3.1
RL = 10 kΩ
– 3.7
RL = 600 Ω
– 3.0
RL = 100 Ω
– 2.2
CIN = COUT = 100
100-µF
µF tantalum,
VID = – 100 mV,
B
h amplifiers
lifi
Both
Voltage loss, SCIN – | SCOUT | (see Note 9)
MIN
RL = 10 kΩ
0.46
RL = 600 Ω
0.50
MAX
UNIT
V
V
V
RL = 100 Ω
0.9
NOTES: 9. For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter with SCREF, OSC, and FB/SD
unconnected. The voltage losses may be higher in other configurations.
supply current (no load), TA = 25°C
PARAMETER
TEST CONDITIONS
Supply current
VCC+ = 5 V,
VCC+ = 5 V,
Supply current in shutdown
SCIN = 5 V,
SCIN = 5 V,
MIN
V(FB/SD) = 2.5 V,
V(FB/SD) = 0 V,
VO = 0
VO = 0
TYP
MAX
UNIT
3.4
mA
265
µA
PARAMETER MEASUREMENT INFORMATION
operational amplifier
2 kΩ
VCC +
VCC +
–
VO
VI
–
VO
+
VCC –
CL
(see Note A)
+
RL
RS = 20 Ω
VCC –
RS = 20 Ω
NOTE A: CL includes fixture capacitance.
Figure 1. Slew-Rate Test Circuit
POST OFFICE BOX 655303
Figure 2. Noise-Voltage Test Circuit
• DALLAS, TEXAS 75265
9
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
PARAMETER MEASUREMENT INFORMATION
10 kΩ
VCC +
100 Ω
VI
–
VO
+
VCC –
CL
(see Note A)
RL
NOTE A: CL includes fixture capacitance.
Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit
amplifier input bias offset current
At the picoampere bias-current level typical of the TLE2662, accurate measurement of the amplifier’s bias
current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can
easily exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments
uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but
with no device in the socket. The device is then inserted into the socket and a second test that measures both
the socket leakage and the device input bias current is performed. The two measurements are then subtracted
algebraically to determine the bias current of the device.
RL
1
1OUT
VCC +
2
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
3
4
COUT
+
0.1 µF
SCOUT
CAP –
SCREF
GND
6
7
OSC
CAP +
SCIN
FB/SD
8
Figure 4. Test Circuit
10
POST OFFICE BOX 655303
15
14
0.1 µF
RL
13
TLE2662
5
1N4933
16
• DALLAS, TEXAS 75265
12
11
CIN
+
10
9
+
2 µF
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS
Table of Graphs
operational amplifier section
FIGURE
VIO
IIB
Input offset voltage
Distribution
5
Input bias current
vs Free-air temperature
6
IIO
VIC
Input offset current
vs Free-air temperature
6
Common-mode input voltage
vs Free-air temperature
VOM
Maximum peak output voltage
vs Output current
vs Supply voltage
VO(PP)
Maximum peak-to-peak output voltage
vs Frequency
AVD
Differential voltage amplification
vs Frequency
q
y
vs Free-air temperature
15
16
IOS
Short circuit output current
Short-circuit
vs Time
vs Free-air temperature
17
18
zo
Output impedance
vs Frequency
19
CMRR
Common-mode rejection ratio
vs Frequency
20
ICC
Supply current
vs Supply
y voltage
g
vs Free-air temperature
21
22
Pulse response
Small signal
g
Large signal
23, 24
25, 26
Noise voltage (referenced to input)
0.1 to 10 Hz
27
Equivalent input noise voltage
vs Frequency
28
Total harmonic distortion
vs Frequency
29, 30
B1
Unity gain bandwidth
Unity-gain
vs Supply
y voltage
g
vs Free-air temperature
31
32
φm
Phase margin
g
vs Supply
y voltage
g
vs Load capacitance
vs Free-air temperature
33
34
35
Phase shift
vs Frequency
15
Shutdown threshold voltage
vs Free-air temperature
36
Supply current
vs Input voltage
37
Oscillator frequency
vs Free-air temperature
38
Supply current in shutdown
vs Input voltage
39
Average supply current
vs Output current
40
Output voltage loss
vs Input capacitance
vs Oscillator frequency
41
42, 43
Regulated output voltage
vs Free-air temperature
44
Reference voltage change
vs Free-air temperature
45
Voltage loss
vs Output current
46
Vn
THD
7
8, 9
10,11,12
13, 14
switched-capacitor section
ICC
fosc
VO
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
INPUT BIAS CURRENT
AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
DISTRIBUTION OF
INPUT OFFSET VOLTAGE
15
10 5
IIB
I IO – Input Bias and
IIB and IIO
Input Offset Currents – nA
Percentage of Amplifiers – %
1836 Amplifiers Tested From 1 Wafer Lot
VCC ± = ± 15 V
TA = 25°C
10
5
0
–4
VCC ± = ± 15 V
VIC = 0
10 4
10 3
IIB
10 2
IIO
101
100
–3
–2
–1
0
1
2
3
25
4
45
Figure 5
VOM+
V
OM+ – Maximum Positive Peak Output Voltage – V
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VIC
V
IC – Common-Mode Input Voltage – V
VCC + + 2
VIC +
VCC +
VCC – + 4
VCC – + 3
VCC – + 2
– 75
VIC –
– 50
– 25
0
25
50
75
TA – Free-Air Temperature – °C
100
20
TA = 25°C
18
16
14
12
VCC ± = ± 15 V
10
8
6
4
2
VCC ± = ± 5 V
0
0
–10
– 20
– 30
Figure 8
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
POST OFFICE BOX 655303
– 40
IO – Output Current – mA
Figure 7
12
85
Figure 6
COMMON-MODE INPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC + + 1
65
TA – Free-Air Temperature – °C
VIO – Input Offset Voltage – mV
• DALLAS, TEXAS 75265
– 50
– 60
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
20
– 20
TA = 25°C
– 18
VVOM
OM – Maximum Peak Output Voltage – V
VVOM–
OM – – Maximum Negative Peak Output Voltage – V
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
– 16
– 14
VCC ± = ± 15 V
– 12
– 10
–8
–6
–4
VCC ± = ± 5 V
–2
0
0
5
10
15
20
25
30
35
15
10
VOM +
5
0
–5
VOM –
– 10
– 15
– 20
40
RL = 10 kΩ
TA = 25°C
0
2
IO – Output Current – mA
Figure 9
10
VOM
V
OM – Maximum Peak Output Voltage – V
VOM
V
OM – Maximum Peak Output Voltage – V
6
RL = 600 Ω
15 TA = 25°C
VOM +
5
0
–5
VOM –
– 10
– 15
2
4
6
8
8
10
12
14
16
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
20
0
6
Figure 10
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
– 20
4
|VCC ±| – Supply Voltage – V
10
12
14
16
RL = 100 Ω
TA = 25°C
4
VOM +
2
0
–2
VOM –
–4
–6
0
|VCC ±| – Supply Voltage – V
2
4
6
|VCC ±| – Supply Voltage – V
8
Figure 12
Figure 11
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
VV)(PP)
O(PP) – Maximum Peak-to-Peak Output Voltage – V
VO(PP) – Maximum Peak-to-Peak Output Voltage – V
VO(PP)
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
10
VCC ± = ± 5 V
RL = 10 kΩ
TA = 25°C
8
6
4
2
0
10 k
100 k
1M
10 M
30
VCC ± = ± 15 V
RL = 10 kΩ
TA = 25°C
25
20
15
10
5
0
10 k
100 k
1M
f – Frequency – Hz
f – Frequency – Hz
Figure 13
Figure 14
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION and PHASE SHIFT
vs
FREQUENCY
120
60°
Phase Shift
ÁÁ
ÁÁ
80
80°
100°
AVD
60
120°
40
140°
20
0
– 20
0.1
160°
VCC ± = ± 15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
1
10
180°
100
1k
200°
10 k 100 k 1 M 10 M
f – Frequency – Hz
Figure 15
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Phase Shift
AVD
A
VD – Large-Signal Differential
Voltage Amplification – dB
100
10 M
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
400
RL = 10 kΩ
AVD
A
VD – Large-Signal Differential
Voltage Amplification – V/mV
350
Á
Á
Á
300
250
VCC ± = ± 15 V
200
150
VCC ± = ± 5 V
100
50
0
– 75
– 50
– 25
0
25
50
75
TA – Free-Air Temperature – °C
100
Figure 16
SHORT-CIRCUIT OUTPUT CURRENT
vs
TIME
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
80
VID = – 100 mV
60
IOS
IOS – Short-Circuit Output Current – mA
IIOS
OS – Short-Circuit Output Current – mA
80
40
VCC ± = ± 15 V
TA = 25°C
VO = 0
20
0
– 20
– 40
VID = 100 mV
– 60
– 80
0
10
20
30
40
50
60
VCC ± = ± 15 V
VO = 0
60
VID = – 100 mV
40
20
0
– 20
VID = 100 mV
– 40
– 60
– 80
– 75
– 50
– 25
0
25
50
75
100
TA – Free-Air Temperature – °C
t – Time – s
Figure 17
Figure 18
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
100
35
zzo
Ω
o – Output Impedance – O
30
CMRR – Common-Mode Rejection Ratio – dB
VCC ± = ± 15 V
TA = 25°C
25
AVD = 10
20
15
AVD = 100
AVD = 1
10
5
0
100
1k
10 k
100 k
1M
TA = 25°C
80
VCC ± = ± 5 V
60
40
20
0
10
10 M
100
1k
10 k
100 k
f – Frequency – Hz
f – Frequency – Hz
Figure 19
Figure 20
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
1M
10 M
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
700
700
VO = 0
No Load
675
675
VO = 0
No Load
650
A
IICC
CC – Supply Current – µxA
µA
IICC
CC – Supply Current – xA
TA = 85°C
625
600
TA = 25°C
575
550
650
VCC ± = ± 15 V
625
600
575
550
VCC ± = ± 5 V
TA = – 55°C
525
525
500
0
2
4
6
8
10
12
14
16
500
– 75
– 50
– 25
Figure 22
Figure 21
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
16
0
POST OFFICE BOX 655303
25
50
TA – Free-Air Temperature – °C
|VCC ±| – Supply Voltage – V
• DALLAS, TEXAS 75265
75
100
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
100
100
50
50
VO – Output Voltage – mV
VO
VO
VO – Output Voltage – mV
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
0
VCC ± = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
– 50
– 100
0
1
2
0
VCC ± = ± 15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
– 50
– 100
3
0
1
t – Time – µs
t – Time – µs
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
4
15
VCC ± = ± 5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
10
VO – Output Voltage – V
VO
VO – Output Voltage – V
VO
3
Figure 24
Figure 23
3
2
2
1
0
VCC ± = ± 15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
5
0
–5
– 10
–1
–2
– 15
0
5
10
15
0
t – Time – µs
10
20
t – Time – µs
30
40
Figure 26
Figure 25
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
NOISE VOLTAGE
(REFERRED TO INPUT)
0.1 TO 10 Hz
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
1
Vn – Equivalent Input Noise Voltage – nV/
Hz
VN
nVCHz
VCC ± = ± 15 V
TA = 25°C
Noise Voltage – µV
uV
0.5
0
– 0.5
100
VDD ± = ± 5 V
RS = 20 Ω
TA = 25°C
See Figure 2
80
60
40
20
0
–1
0
1
2
3
4
5
6
7
8
9
1
10
10
Figure 27
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
0.6
AVD = 2
VO(PP) = 2 V
TA = 25°C
THD – Total Harmonic Distortion – %
THD – Total Harmonic Distortion – %
0.3
0.2
0.15
VCC ± = ± 5 V
0.1
0.5
0
10
Source Signal
100
1k
10 k
100 k
0.5
AVD = 10
VO(PP) = 2 V
TA = 25°C
0.4
0.3
VCC ± = ± 5 V
0.2
Source Signal
0.1
0
10
100
1k
f – Frequency – Hz
f – Frequency – Hz
Figure 29
Figure 30
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
18
10 k
Figure 28
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
0.25
1k
100
f – Frequency – Hz
t – Time – s
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
10 k
100 k
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
2.5
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 3
B1 – Unity-Gain Bandwidth – MHz
b1
B1
B1 – Unity-Gain Bandwidth – MHz
2.5
2
1.5
2
4
6
8
12
10
14
2
VCC ± = ± 5 V
1.5
RL = 10 kΩ
CL = 100 pF
See Figure 3
1
– 75
1
0
VCC ± = ± 15 V
16
– 50
– 25
50
75
100
Figure 32
Figure 31
PHASE MARGIN
vs
SUPPLY VOLTAGE
PHASE MARGIN
vs
LOAD CAPACITANCE
60°
62°
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 3
VCC ± = ± 15 V
RL = 10 kΩ
TA = 25°C
See Figure 3
50°
60°
φxx
m – Phase Margin
0m
φ
m – Phase Margin
25
TA – Free-Air Temperature – °C
|VCC ±| – Supply Voltage – V
61°
0
59°
58°
40°
30°
20°
57°
10°
56°
55°
0
0°
2
4
6
8
10
12
14
16
0
200
400
600
800
1000
CL – Load Capacitance – pF
|VCC ±| – Supply Voltage – V
Figure 33
Figure 34
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
OPERATIONAL AMPLIFIER SECTION
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
66°
RL = 10 kΩ
CL = 100 pF
See Figure 3
φ m – Phase Margin
mm
64°
62°
VCC ± = ± 15 V
60°
58°
VCC ± = ± 5 V
56°
54°
– 75
– 50
0
25
50
75
– 25
TA – Free-Air Temperature – °C
100
Figure 35
SHUTDOWN THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
INPUT VOLTAGE
0.6
5
4
V(FB/SD)
I CC – Supply Current – mA
Shutdown Threshold Voltage – V
IO = 0
0.5
0.4
0.3
0.2
2
1
0.1
0
– 50
3
0
25
50
75
– 25
TA – Free-Air Temperature – °C
100
0
0
Figure 36
5
10
VI – Input Voltage – V
Figure 37
† Data applies for the amplifier block only; the switched-capacitor block is not supplying VCC – supply.
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
SWITCHED-CAPACITOR SECTION
SUPPLY CURRENT IN SHUTDOWN
vs
INPUT VOLTAGE
OSCILLATOR FREQUENCY
vs
FREE-AIR TEMPERATURE
120
35
Supply Current in Shutdown – µA
f osc – Oscillator Frequency – kHz
33
31
29
VCC = 15 V
27
25
VCC = 3.5 V
23
21
19
100
V(FB/SD) = 0
80
60
40
20
17
15
– 75
0
– 50
0
25
50
75
– 25
TA – Free-Air Temperature – °C
100
0
5
10
VI – Input Voltage – V
15
Figure 39
Figure 38
OUTPUT VOLTAGE LOSS
vs
INPUT CAPACITANCE
AVERAGE SUPPLY CURRENT
vs
OUTPUT CURRENT
1.4
140
TA = 25°C
1.2
IO = 100 mA
Output Voltage Loss – V
Average Supply Current – mA
120
100
80
60
40
1
0.8
IO = 50 mA
0.6
IO = 10 mA
0.4
Inverter Configuration
COUT = 100-µF Tantalum
fosc = 25 kHz
0.2
20
0
0
0
20
40
80
60
100
0
10
IO – Output Current – mA
Figure 40
20
30 40 50 60 70 80
Ci – Input Capacitance – µF
90 100
Figure 41
† Data applies for the switched-capacitor block only. Amplifier block is not connected.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
SWITCHED-CAPACITOR SECTION
OUTPUT VOLTAGE LOSS
vs
OSCILLATOR FREQUENCY
OUTPUT VOLTAGE LOSS
vs
OSCILLATOR FREQUENCY
2.5
2.5
Inverter Configuration
CIN = 10-µF Tantalum
COUT = 100-µF Tantalum
2.25
2
Output Voltage Loss – V
2
Output Voltage Loss – V
Inverter Configuration
CIN = 100-µF Tantalum
COUT= 100-µF Tantalum
2.25
1.75
1.5
IO = 100 mA
1.25
1
IO = 50 mA
0.75
0.5
1.75
1.5
1
0.25
0.25
0
0
10
fosc – Oscillator Frequency – kHz
IO = 50 mA
0.75
0.5
IO = 10 mA
1
IO = 100 mA
1.25
IO = 10 mA
1
100
Figure 42
REFERENCE VOLTAGE CHANGE
vs
FREE-AIR TEMPERATURE
100
– 4.8
Reference Voltage Change – mV
VO – Regulated Output Voltage – V
– 4.7
– 4.9
–5
– 5.1
–11.6
–11.8
–12
SCREF = 2.5 V
80 TA = 25°C
60
40
20
0
– 20
– 40
–12.2
– 60
–12.4
– 80
75
0
25
50
– 25
TA – Free-Air Temperature – °C
100
– 100
– 50
Figure 44
75
– 25
0
25
50
TA – Free-Air Temperature – °C
Figure 45
† Data applies for the switched-capacitor block only. Amplifier block is not connected.
22
100
Figure 43
REGULATED OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–12.6
– 50
10
fosc – Oscillator Frequency – kHz
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS†
SWITCHED-CAPACITOR SECTION
VOLTAGE LOSS
vs
OUTPUT CURRENT
2
3.5 V ≤ VCC ≤ 15 V
CIN = COUT = 100 µF
1.8
Voltage Loss – V
1.6
1.4
1.2
TA = 85°C
1
0.8
0.6
TA = 25°C
0.4
0.2
0
0
10
20
30 40 50 60 70
Output Current – mA
80
90 100
Figure 46
† Data applies for the switched-capacitor block only. Amplifier block is not connected.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
23
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
amplifier section
input characteristics
The TLE2662 is specified with a minimum and a maximum input voltage that if exceeded at either input, could
cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2662
operational amplifier section is well suited for low-level signal processing; however, leakage currents on printedcircuit boards and sockets can easily exceed bias-current requirements and cause degradation in system
performance. It is a good practice to include guard rings around inputs (see Figure 47). These guards should
be driven from a low-impedance source at the same voltage level as the common-mode input.
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
VI
+
+
VI
+
VO
VO
–
–
VO
VI
–
Figure 47. Use of Guard Rings
switched-capacitor section
VCC
SCREF
2.5 V
REF
R
Drive
+
CAP +
–
FB/SD
CIN†
Q
OSC
OSC
Q
R
CAP –
Drive
Drive
GND
COUT†
SCOUT
Drive
† External capacitors
Figure 48. Functional Block Diagram for Switched-Capacitor Block Only
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
switched-capacitor section (continued)
The TLE2662, with its high-output-drive amplifiers and switched-capacitor voltage converter, readily lends itself
to applications like headphone drivers where large signal swing into heavy loads is paramount. Another
application is analog-to-digital interfacing when only a single rail is available to the system, but maximization
of the ADC dynamic range is key. See Figure 48 for the functional block diagram of the switched-capacitor block.
typical application
In its most basic configuration, the TLE2662 switched-capacitor section is used as a voltage inverter to provide
the negative rail for the amplifiers in a single-supply system. As shown in Figure 49, the positive 5-V supply is
connected to both VCC + and SCIN. VCC – is connected to the output of the charge pump, SCOUT. Only three
external components (excluding the resistors used with the amplifiers) are necessary: the storage capacitors,
CIN and COUT, and a fast-recovery Schottky diode to clamp SCOUT during start up. The diode is necessary
because the amplifiers present a load referenced to the positive rail and tends to pull SCOUT above ground,
which can cause the device to fail to start up (see pin functions section in APPLICATION INFORMATION). As
shown in Figure 50, one amplifier is shown driving a resistive load; the other is interfacing to an analog-to-digital
converter (ADC).
RL
5V
To ADC
RF
RF
Signal
From
Preamplifier
1
2
3
4
5
Filter
1N4933
COUT
+
6
7
8
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
SCOUT
CAP –
SCREF
GND
OSC
CAP +
SCIN
FB/SD
16
15
RF
RIN
14
13
Signal
From
Transducer
12
CIN
11
+
10
9
Shutdown
Figure 49. Switched-Capacitor Block Supplying Negative Rail for Amplifiers
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
typical application (continued)
5V
RF
Signal
From
Preamplifier
RF
RI
Signal
From
Transducer
–
+
RI
Amplifier 1
–
+
To ADC
Amplifier 2
RL
Shutdown
SCIN
SCOUT
Voltage
Converter
FB/SD
SCREF
Figure 50. Equivalent Schematic: Amplifier 1 Driving Resistive Load,
Amplifier 2 Interfacing to an ADC
Though simple, this configuration has the inherent disadvantage of having ripple and switching-noise
components on SCOUT. These are coupled into the amplifier’s signal path, effectively introducing distortion into
the output waveform. The effect is most pronounced when the outputs are driven low, loading the negative rail
generated by the charge pump. A first approach to minimizing these effects is to increase the size of COUT using
a low-ESR type capacitor (refer to the switched-capacitor selection section under capacitor selection and output
ripple). Figures 51 and 52 compare the ripple and noise present at the amplifier output with COUT = 10 µF and
COUT = 100 µF, respectively, with the outputs driven low into a 600-Ω load.
26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
RIPPLE AND SWITCHING NOISE ON
AMPLIFIER OUTPUT
vs
TIME
Ripple and Switching Noise on Amplifier Output – mV
Ripple and Switching Noise on Amplifier Output – mV
typical application (continued)
VOL+ 80
VCC+ = 5 V
RL = 600 Ω
CIN = 100 µF
COUT = 10 µF
VID = –100 mV
VOL+ 60
VOL+ 40
VOL+ 20
VOL
VOL– 20
VOL– 40
VOL– 60
VOL– 80
0
10
20
30
40
50
60
70
80
RIPPLE AND SWITCHING NOISE ON
AMPLIFIER OUTPUT
vs
TIME
VOL+ 20
VCC+ = 5 V
RL = 600 Ω
CIN = 100 µF
COUT = 100 µF
VID = –100 mV
VOL+ 15
VOL+ 10
VOL+ 5
VOL
VOL– 5
VOL– 10
VOL– 15
VOL– 20
0
90 100
10
20
30
40
50
60
70
80
90 100
t – Time – µs
t – Time – µs
Figure 51
Figure 52
Additional filtering can be added between SCOUT and VCC – to further reduce ripple and noise. For example,
adding the simple low-pass LC filter shown in Figure 53, implemented using a 50-µH inductor and 220-µF
capacitor (available in surface mount), results in the reduced levels of ripple and switching noise at the
amplifier’s outputs (see Figures 54 and 55). Larger values of L or C can be used for even better attenuation.
LH
SCOUT
VCC
0.1 µF
COUT
CF
+
Filter
fr =
1
2π
LC
Figure 53. LC Filter Used to Reduce Ripple and Switching Noise, fr = 1/2π√LC, A = – 40 dB Per Decade
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
typical application (continued)
VOL+ 8
VCC+ = 5 V
RL = 600 Ω
CIN = 100 µF
COUT = 10 µF
VOL+ 6
VOL+ 4
VOL+ 2
VOL
VOL– 2
VOL– 4
Filter:
LF = 50 µH
CF = 220 µF
See Figure 53
VOL– 6
VOL– 8
0
10
20
30
40 50 60 70
t – Time – µs
80
90 100
RIPPLE AND SWITCHING NOISE ON
AMPLIFIER OUTPUT
vs
TIME
Ripple and Switching Noise on Amplifier Output – mV
Ripple and Switching Noise on Amplifier Output – mV
RIPPLE AND SWITCHING NOISE ON
AMPLIFIER OUTPUT
vs
TIME
VOL+ 8
VCC+ = 5 V
RL = 600 Ω
CIN = 100 µF
COUT = 100 µF
VOL+ 6
VOL+ 4
VOL+ 2
VOL
VOL– 2
VOL– 4
Filter:
LF = 50 µH
CF = 220 µF
See Figure 53
VOL– 6
VOL– 8
0
10
Figure 54
28
20
30
40 50 60
t – Time – µs
Figure 55
POST OFFICE BOX 655303
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70
80
90 100
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
precision measurement techniques
In systems where the amplifier outputs are being sampled by an analog-to-digital converter (ADC), the
switched-capacitor network can be temporarily disabled by applying a voltage of less then 0.45 V to FB/SD. This
is easily accomplished using any open-collector gate (shown by dashed lines in Figure 49). When disabled, the
internal switches are set to dump any remaining charge onto COUT. The voltage at SCOUT decays to zero at
a rate dependent on both the size of COUT and loading. During this time, the amplifier’s outputs are free of any
switching-induced ripple and noise. Figure 56 shows the relationship of the output voltage decay time to the size
of the output storage capacitor when one channel of the amplifier is driving a 100-Ω load to ground. SCOUT
rises again when the external gate is turned off (see Figure 57).
OFF-STATE VOLTAGE DECAY AT OUTPUT
vs
TIME
TURN-ON VOLTAGE RISE AT OUTPUT
vs
TIME
6
VCC+ = 5 V
VCC – = SCOUT
CIN = 100 µF
RL = 100 Ω
VID = – 100 mV
4
Turn-On Voltage Rise at Output – V
Off-State Voltage Decay at Output – V
6
2
COUT = 22 µF
0
COUT = 100 µF
–2
COUT = 220 µF
–4
VCC+ = 5 V
VCC – = SCOUT
CIN = 100 µF
RL = 100 Ω
VID = – 100 mV
4
2
0
COUT = 100 µF
–2
COUT = 220 µF
–4
COUT = 22 µF
–6
–6
0
10
20
30
40
50
t – Time – ms
60
70
80
0
10
Figure 56
20
30
40
50
t – Time – ms
60
70
80
Figure 57
The amplifier’s negative input common-mode voltage limit (VICR –) is specified as an offset from the negative
rail. Care should be taken to ensure that the input signal does not violate this limit as SCOUT decays. The
negative output voltage swing is similarly affected by the gradual loss of the negative rail.
This application takes advantage of the otherwise unused SCREF output of the switched-capacitor block to bias
one amplifier to 2.5 V. This is especially useful when the amplifier is followed by an ADC, keeping the signal
centered in the middle of the converter dynamic range. Other biasing methods may be necessary in precision
systems.
In Figure 58, SCREF , R1, and R2 are used to generate a feedback voltage to the TLE2662 error amplifier. This
voltage, fed into FB/SD, is used to regulate the voltage at SCOUT. When used this way, there is higher voltage
loss ( SCIN – |SCOUT| ) associated with the regulation. For example, the inverter generates an unregulated
voltage of approximately – 4.5 V from a positive 5-V source; it can achieve a regulated output voltage of only
about – 3.5 V. Though this reduces the amplifier input and output dynamic range, both VICR – and VOL still extend
to below ground.
POST OFFICE BOX 655303
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29
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
precision measurement techniques (continued)
RL
5V
To ADC
RF
RI
1
2
COUT
3
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
16
15
RF
RI
14
+
4
+
C1
R2
5
R1
SCOUT
6
SCREF
7
1N4933
8
CAP–
GND
OSC
CAP+
SCIN
FB/SD
13
12
CIN
11
+
10
9
Restart
R2
+ R1
ǒ
|
SCOUT |
SCREF 40 mV
2
*
Ǔ
)1
R3
Shutdown
R4
Where: SCREF = 2.5 V Nominal
Figure 58. Voltage Inverter With Regulated Output
The reference voltage, though being used as part of the regulation circuitry, is still available for other uses if total
current drawn from it is limited to under 60 µA. The shutdown feature also remains available, though a restart
pulse may be necessary to start the switched-capacitor if the voltage on COUT is not fully discharged. This
restart pulse is isolated from the feedback loop using a blocking diode in the regulation section.
The circuit designer should be aware that the TLE2662 amplifier and switched-capacitor sections are tested
and specified separately. Performance may differ from that shown in the typical characteristics section when
used together. This is evident, for example, in the dependence of VICR – and VOL on VCC –. The impact of
supplying the amplifier negative rail using the switched-capacitor block in each design should be considered
and carefully evaluated.
The more esoteric features of the switched-capacitor building block, including external synchronization of the
internal oscillator and power dissipation considerations, are covered in detail in the following section.
30
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
switched-capacitor function
A review of a basic switched-capacitor building block is helpful in understanding the operation of the TLE2662.
When the switch shown in Figure 59 is in the left position, capacitor C1 charges to the voltage at V1. The total
charge on C1 is q1 = C1V1. When the switch is moved to the right, C1 is discharged to the voltage at V2. After
this discharge time, the charge on C1 is q2 = C1V2. The charge has been transferred from the source V1 to
the output V2. The amount of charge transferred is as shown in equation 1.
∆q = q1 – q2 = C1(V1 – V2)
(1)
If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is shown in equation 2.
I = f x ∆q = f x C1(V1 – V2)
(2)
To obtain an equivalent resistance for a switched-capacitor network, this equation can be rewritten in terms of
voltage and impedance equivalence as shown in equation 3.
I
+ V1(1ń*fC1)V2 + V1R * V2
(3)
EQUIV
V1
V2
f
C1
RL
C2
Figure 59. Switched-Capacitor Block
A new variable, REQUIV, is defined as REQUIV = 1 ÷ fC1. The equivalent circuit for the switched-capacitor network
is as shown in Figure 60. The TLE2662 has the same switching action as the basic switched-capacitor voltage
converter. Even though this simplification does not include finite switch-on resistance and output-voltage ripple,
it provides an insight into how the device operates.
These simplified circuits explain voltage loss as a function of oscillator frequency (see Figure 43). As oscillator
frequency is decreased, the output impedance is eventually dominated by the 1/fC1 term and voltage losses
rise.
Voltage losses also rise as oscillator frequency increases. This is caused by internal switching losses that occur
due to some finite charge being lost on each switching cycle. This charge loss per-unit-cycle, when multiplied
by the switching frequency, becomes a current loss. At high frequency, this loss becomes significant and voltage
losses again rise. The oscillator of the TLE2662 switched-capacitor section is designed to run in the frequency
band where voltage losses are at a minimum.
REQUIV
V1
REQUIV =
V2
1
fC1
C2
RL
Figure 60. Switched-Capacitor Equivalent Circuit
POST OFFICE BOX 655303
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31
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
pin functions (see functional block diagram – converter)
Supply voltage (SCIN) alternately charges CIN to the input voltage when CIN is switched in parallel with the
input supply, and then transfers charge to COUT when CIN is switched in parallel with COUT. Switching
occurs at the oscillator frequency. During the time that CIN is charging, the peak supply current is
approximately 2.2 times the output current. During the time that CIN is delivering a charge to COUT, the
supply current drops to approximately 0.2 times the output current. An input supply bypass capacitor supplies
part of the peak input current drawn by the TLE2662 switched-capacitor section and averages out the current
drawn from the supply. A minimum input supply bypass capacitor of 2 µF, preferably tantalum or some other
low-ESR type, is recommended. A larger capacitor is desirable in some cases. An example is when the actual
input supply is connected to the TLE2662 through long leads or when the pulse currents drawn by the
TLE2662 might affect other circuits through supply coupling.
In addition to being the output pin, SCOUT is tied to the substrate of the device. Special care must be taken in
TLE2662 circuits to avoid making SCOUT positive with respect to any of the other pins. For circuits with the
output load connected from VCC + to SCOUT or from some external positive supply voltage to SCOUT, an
external Schottky diode must be added (see Figure 61). This diode prevents SCOUT from being pulled above
the GND during start up. A fast-recovery diode such as IN4933 with low forward voltage (Vf ≈ 0.2 V) can be
used.
1
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
2
3
4
5
SCOUT
IN4933
COUT
+
SCOUT
CAP –
SCREF
GND
6
7
OSC
CAP +
SCIN
FB/SD
8
Load
16
15
14
13
12
11
CIN
+
10
9
VCC+ or External Supply Voltage
Figure 61. Circuit With Load Connected From VCC to SCOUT
The voltage reference (SCREF) output provides a 2.5-V reference point for use in TLE2662-based regulator
circuits. The temperature coefficient (TC) of the reference voltage has been adjusted so that the TC of the
regulated output voltage is near zero. As seen in the typical performance curves, this requires the reference
output to have a positive TC. This nonzero drift is necessary to offset a drift term inherent in the internal
reference divider and comparator network tied to the feedback pin. The overall result of these drift terms is a
regulated output that has a slight positive TC at output voltages below 5 V and a slight negative TC at output
voltages above 5 V. For regulator-feedback networks, reference output current should be limited to
approximately 60 µA. SCREF draws approximately 100 µA when shorted to ground and does not affect the
internal reference/regulator. This pin can also be used as a pullup for TLE2662 circuits that require
synchronization.
32
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
pin functions (continued)
CAP+ is the positive side of input capacitor (CIN) and is alternately driven between VCC and ground. When
driven to VCC, CAP+ sources current from VCC. When driven to ground, CAP+ sinks current to ground. CAP –
is the negative side of the input capacitor and is driven alternately between ground and SCOUT. When driven
to ground, CAP– sinks current to ground. When driven to SCOUT, CAP– sources current from COUT. In all
cases, current flow in the switches is unidirectional as should be expected when using bipolar switches.
OSC can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock.
Internally, OSC is connected to the oscillator timing capacitor (Ct ≈ 150 pF), which is alternately charged and
discharged by current sources of ±7 µA, so that the duty cycle is approximately 50%. The TLE2662
switched-capacitor section oscillator is designed to run in the frequency band where switching losses are
minimized. However, the frequency can be raised, lowered, or synchronized to an external system clock if
necessary.
The frequency can be increased by adding an external capacitor (C2 in Figure 62) in the range of 5 pF – 20 pF
from CAP+ to OSC. This capacitor couples a charge into Ct at the switch transitions. This shortens the charge
and discharge time and raises the oscillator frequency. Synchronization can be accomplished by adding an
external pullup resistor from OSC to SCREF . A 20-kΩ pullup resistor is recommended. An open-collector gate
or an npn transistor can then be used to drive OSC at the external clock frequency as shown in Figure 62. The
frequency can be lowered by adding an external capacitor (C1 in Figure 62) from OSC to ground. This increases
the charge and discharge times, which lowers the oscillator frequency.
1
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
2
3
4
COUT
5
C1
SCOUT
CAP –
SCREF
GND
+
6
7
C2
SCIN
OSC
CAP +
SCIN
FB/SD
8
16
15
14
13
12
CIN
11
+
10
9
Figure 62. External Clock System
The feedback/shutdown (FB/SD) pin has two functions. Pulling FB/SD below the shutdown threshold ( ≈ 0.45 V)
puts the device into shutdown. In shutdown, the reference/regulator is turned off and switching stops. The
switches are set such that both CIN and COUT are discharged through the output load. Quiescent current in
shutdown drops to approximately 100 µA . Any open-collector gate can be used to put the TLE2662 into
shutdown. For normal (unregulated) operation, the device restarts when the external gate is shut off. In
TLE2662 circuits that use the regulation feature, the external resistor divider can provide enough pulldown to
keep the device in shutdown until the output capacitor (COUT) has fully discharged. For most applications
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
33
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
where the TLE2662 is run intermittently, this does not present a problem because the discharge time of the
output capacitor is short compared to the off time of the device. In applications where the device has to start-up
before the output capacitor (COUT) has fully discharged, a restart pulse must be applied to FB/SD of the
TLE2662.
Using the circuit shown in Figure 63, the restart signal can be either a pulse (tp > 100 µs) or a logic high. Diode
coupling the restart signal into FB/SD allows the output voltage to rise and regulate without overshoot. The
resistor divider R3/R4 shown in Figure 63 should be chosen to provide a signal level at FB/SD of 0.7 V – 1.1 V.
FB/SD is also the inverting input of the TLE2662 switched-capacitor section error amplifier, and as such can
be used to obtain a regulated output voltage.
COUT
100 µF Tantalum
+
1
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
2
C1
+
3
4
SCOUT
R2
5
SCOUT
R1
CAP –
6
SCREF
GND
7
+ R1
ǒ
2.2 µF
| SCOUT |
SCREF 40 mV
2
*
CAP +
SCIN
FB/SD
8
SCIN
R2
OSC
Ǔ
+
16
15
14
13
12
11
+
CIN
10 µF
Tantalum
10
9
R3
R4
)1
Shutdown
Where: SCREF = 2.5 V Nominal
Restart
Figure 63. Basic Regulation Configuration
regulation
The error amplifier of the TLE2662 switched-capacitor section drives the npn switch to control the voltage across
the input capacitor (CIN), which determines the output voltage. When the reference and error amplifier of the
TLE2662 is used, an external resistive divider is all that is needed to set the regulated output voltage. Figure 63
shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R1
should be 20 kΩ or greater because the reference current is limited to ± 100 µA. R2 should be in the range of
100 kΩ to 300 kΩ. Frequency compensation is accomplished by adjusting the ratio of CIN to COUT. For best
results, this ratio should be approximately 1 to 10. Capacitor C1, required for good load regulation, should be
0.002 µF for all output voltages.
34
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
regulation (continued)
The functional block diagram shows that the maximum regulated output voltage is limited by the supply voltage.
For the basic configuration, SCOUT referenced to GND of the TLE2662 must be less than the total of the
supply voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the
switches can be found in the typical performance curves.
capacitor selection
While the exact values of CIN and COUT are noncritical, good-quality low-ESR capacitors such as solid
tantalum are necessary to minimize voltage losses at high currents. For CIN, the effect of the equivalent series
resistance (ESR) of the capacitor is multiplied by four, since switch currents are approximately two times higher
than output current. Losses occur on both the charge and discharge cycle, which means that a capacitor with
1 Ω of ESR for CIN has the same effect as increasing the output impedance of the switched-capacitor section
by 4 Ω. This represents a significant increase in the voltage losses. COUT is alternately charged and discharged
at a current approximately equal to the output current. The ESR of the capacitor causes a step function to occur
in the output ripple at the switch transitions. This step function degrades the output regulation for changes in
output load current and should be avoided. A technique used is to parallel a smaller tantalum capacitor with a
large aluminum electrolytic capacitor to gain both low ESR and reasonable cost.
output ripple
The peak-to-peak output ripple is determined by the output capacitor and the output current values.
Peak-to-peak output ripple is approximated as shown in equation 4:
DV
+ 2 IfCO
(4)
O
where:
∆V = peak-to-peak ripple
fOSC = oscillator frequency
For output capacitors with significant ESR, a second term must be added to account for the voltage step at the
switch transitions. This step is approximately equal to equation 5:
ǒ Ǔǒ
2I
O
ESR of C
Ǔ
(5)
O
power dissipation (switched-capacitor section only)
The power dissipation of any TLE2662 circuit must be limited so that the junction temperature of the device does
not exceed the maximum junction temperature ratings. The total power dissipation is calculated from two
components, the power loss due to voltage drops in the switches, and the power loss due to drive current losses.
The total power dissipated by the TLE2662 is calculated as shown in equation 6:
P
[ (VCC –
Ť Ť
V
O
) I
O
) (VCC) (IO) (0.2)
(6)
where both VCC and SCOUT refer to GND. The power dissipation is equivalent to that of a linear regulator. Due
to limitations of the DW package, steps must be taken to dissipate power externally for large input or output
differentials. This is accomplished by placing a resistor in series with CIN as shown in Figure 64. A portion of
the input voltage is dropped across this resistor without affecting the output regulation. Since switch current is
approximately 2.2 times the output current and the resistor causes a voltage drop when CIN is both charging
and discharging, the resistor chosen is as shown in equation 7.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
35
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
power dissipation (continued)
X
+ VXń(4.4 IO)
X
[ VCC–
R
where:
V
(7)
ƪ
(TLE2662 voltage loss) (1.3)
)
Ť Ťƫ
V
O
and IOUT = maximum required output current. The factor of 1.3 allows some operating margin for the TLE2662.
When using a 12-V to – 5-V converter at 100-mA output current, calculate the power dissipation without an
external resistor as shown in equation 8.
+ (12 V * | * 5 V | ) (100 mA) ) (12 V) (100 mA) (0.2)
P + 700 mW ) 240 mW + 940 mW
P
1
COUT
+
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
2
C1
3
+
4
SCOUT
R2
5
R1
SCOUT
CAP –
SCREF
GND
6
7
OSC
CAP +
(8)
16
15
14
13
12
11
CIN
+
10
Rx
8
SCIN
FB/SD
9
+
SCIN
Figure 64. Power-Dissipation-Limiting Resistor in Series With CIN
At θJA of 130°C/W for a commercial plastic device, a junction temperature rise of 122°C is seen. The device
exceeds the maximum junction temperature at an ambient temperature of 25°C. To calculate the power
dissipation with an external-resistor (RX), determine how much voltage can be dropped across RX. The
maximum voltage loss of the TLE2662 in the standard regulator configuration at 100 mA output current is 1.6 V
(see equation 9).
X
+ 12 V * ƪ(1.6 V) (1.3) ) Ť – 5 V Ť ƫ + 4.9 V
X
+ 4.9 Vń(4.4) (100 mA) + 11 W
V
and
R
36
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
(9)
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
power dissipation (continued)
The resistor reduces the power dissipated by the TLE2662 by (4.9 V) (100 mA) = 490 mW. The total power
dissipated by the TLE2662 is equal to (940 mW – 490 mW) = 450 mW. The junction temperature rise is 58°C.
Although commercial devices are functional up to a junction temperature of 125°C, the specifications are tested
to a junction temperature of 100°C. In this example, this means limiting the ambient temperature to 42°C. To
allow higher ambient temperatures, the thermal resistance numbers for the TLE2662 packages represent
worst-case numbers with no heat sinking and still air. Small clip-on heat sinks can be used to lower the thermal
resistance of the TLE2662 package. Airflow in some systems helps to lower the thermal resistance. Wide PC
board traces from the TLE2662 leads helps to remove heat from the device. This is especially true for plastic
packages.
basic voltage inverter
The switched-capacitor block is connected as a basic voltage inverter with regulation as shown in Figure 65.
The magnitude of SCIN must exceed that of the desired SCOUT to accommodate voltage losses due to
switching and regulation. Losses of 1 V to 2 V are typical.
1
100 µF
+
1OUT
VCC +
1IN –
2OUT
1IN +
2IN –
VCC –
2IN +
16
2
0.002 µF
15
3
+
14
4
SCOUT
R2
13
5
R1
SCOUT
CAP –
SCREF
GND
12
6
11
+
7
CAP +
SCIN
FB/SD
10
8
SCIN
2 µF
R2
OSC
+ R1
ǒ
+
| SCOUT |
SCREF 40 mV
2
*
Ǔ
) 1 + R1
ǒ
|
SCOUT
1.121 V
|
10 µF
9
Ǔ
)1
Figure 65. Basic Voltage Inverter/Regulator
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
37
TLE2662
DUAL µPOWER JFET-INPUT OPERATIONAL AMPLIFIER
WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
SLOS118B – DECEMBER 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
positive voltage doubler
In this configuration (see Figure 66), the voltage converter is configured as a positive voltage doubler providing a
higher positive rail, approximately 9 V for the amplifiers or other external circuitry. Filtering (not shown) of the output
of the doubler may be necessary.
Output
Signal
1
1OUT
VCC +
1IN –
2OUT
2
3
1IN +
2IN –
VCC –
2IN +
4
5
SCOUT
CAP –
SCREF
GND
6
7
OSC
CAP +
SCIN
FB/SD
8
5V
16
15
RF
R
RIN
14
Input
Signal
13
12
R
11
10
10 µF
9
+
VO
2 µF
+
1N4001
1N4001
+
100 µF
Figure 66. Voltage Converter Configured as Positive Doubler
38
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLE2662IDW
OBSOLETE
SOIC
DW
16
TBD
Call TI
Call TI
TLE2662IDWR
OBSOLETE
SOIC
DW
16
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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