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TPD1E04U04EVM

TPD1E04U04EVM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    -

  • 描述:

    EVALBOARDFORTPD1E04U04

  • 数据手册
  • 价格&库存
TPD1E04U04EVM 数据手册
User's Guide SLVUAN8 – April 2016 TPD1E04U04 Evaluation Module This user's guide describes the characteristics, operation, and use of the TPD1E04U04 EVM evaluation module (EVM). This EVM includes six TPD1E04U04s in various configurations for testing. Five TPD1E04U04s are configured for IEC 61000-4-2 compliance testing and one is configured for 2-port sparameter analysis. This user's guide includes setup instructions, schematic diagrams, a bill of materials, and printed-circuit board layout drawings for the evaluation module. 1 2 3 4 5 6 Contents Introduction ................................................................................................................... Definitions ..................................................................................................................... Setup .......................................................................................................................... 3.1 IEC 61000-4-2 ESD Rating Tests ................................................................................ 3.2 Scattering Parameters ............................................................................................. 3.3 ±8-kV ESD Clamping Waveforms ................................................................................ Board Layout ................................................................................................................. Schematics ................................................................................................................... Bill of Materials ............................................................................................................... 2 2 3 3 4 4 6 6 7 List of Figures 1 2 3 4 ......................... System Level ESD Test Setup ............................................................................................. TPD1E04U04EVM Top Layer and Silkscreen ........................................................................... TPD1E04U04EVM Schematic ............................................................................................. Ideal Contact Discharge Waveform of the Output Current of the ESD Simulator at 4-kV 3 4 6 6 List of Tables ................................................................................................ 1 IEC 61000-4-2 Test Levels 2 Waveform Parameters in Contact Discharge Mode ..................................................................... 2 3 Bill of Materials ............................................................................................................... 7 SLVUAN8 – April 2016 Submit Documentation Feedback TPD1E04U04 Evaluation Module Copyright © 2016, Texas Instruments Incorporated 2 1 Introduction 1 www.ti.com Introduction Texas Instrument’s TPD1E04U04 evaluation module helps designers evaluate the operation and performance of the TPD1E04U04 device. The TPD1E04U04 is a unidirectional TVS ESD protection diode for HDMI 2.0 and USB 3.0 high speed data line protection. The TPD1E04U04 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). The EVM contains six TPD1E04U04s. Five TPD1E04U04s (D1 – D5) are configured with test points for striking ESD to the protection pins. One TPD1E04U04 (D6) is configured with 2 SMA (J1 and J2) connectors for 2-port analysis with a vector network analyzer. TPD1E04U04 (D6) can also be used for capturing clamping waveforms with an oscilloscope during an ESD test. Caution must be taken when capturing clamping waveforms during an ESD event so as not to damage the oscilloscope. A proper procedure is outlined in Section 3.3.1. 2 Definitions Contact Discharge — a method of testing in which the electrode of the ESD simulator is held in contact with the device-under-test (DUT). Air Discharge — a method of testing in which the charged electrode of the ESD simulator approaches the DUT, and a spark to the DUT actuates the discharge. ESD Simulator — a device that outputs IEC 61000-4-2 compliance ESD waveforms shown in Figure 1 with adjustable ranges shown in Table 1 and Table 2. IEC 61000-4-2 has 4 classes of protection levels. Classes 1 – 4 are shown in Table 1. Stress tests should be incrementally tested to level 4 as shown in Table 2 until the point of failure. If the DUT does not fail at 8-kV, testing can continue in 2-kV increments until failure. Table 1. IEC 61000-4-2 Test Levels Contact Discharge Air Discharge Class Test Voltage [± kV] Class Test Voltage [± kV] 1 2 1 2 2 4 2 4 3 6 3 8 4 8 4 15 Table 2. Waveform Parameters in Contact Discharge Mode 2 Stress Level Step Simulator Voltage [kV] Ipeak ±15% [A] Rise Time ±25% [nS] Current at 30 ns ±30% [A] Current at 60 ns ±30% [A] 1 2 7.5 0.8 4 2 2 4 15 0.8 8 4 3 6 22.5 0.8 12 6 4 8 30 0.8 16 8 TPD1E04U04 Evaluation Module SLVUAN8 – April 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Setup www.ti.com IPEAK 30 Current (A) 90% IPEAK 20 10 800 ps 90/10 rise time 10% IPEAK 0 0 20 40 60 Time (ns) 80 100 Figure 1. Ideal Contact Discharge Waveform of the Output Current of the ESD Simulator at 4-kV 3 Setup This section describes the intended use of the EVM. A generalized outline of the procedure given in IEC 61000-4-2 is described here. IEC 61000-4-2 should be referred to for a more specific testing outline. Basic configurations for collecting s-parameters and ESD clamping waveforms are outlined as well. 3.1 IEC 61000-4-2 ESD Rating Tests TPD1E04U04DPY (D1 – D5) can be used for destructive electrostatic discharge (ESD) pass or fail ESD strikes. Specifically, they can be used for both IEC 61000-4-2 air and contact discharge tests. The procedure in Section 3.1.1 ensures proper testing setup and method for both discharge tests. Each IO has a Test Pad (TP1 – TP5) directly connected to it for striking ESD. 3.1.1 Test Method and Set-Up An example test setup is shown in Figure 2. Details of the testing table and ground planes can be found in the IEC 61000-4-2 test procedure. Ground the EVM using the banana connector J3. Discharge the ESD simulator on any of the test points TP1 – TP5. Contact and air-gap discharge are tested using the same simulator with the same discharge waveform. While the simulator is in direct contact with the test point during contact, it is not during air-gap. SLVUAN8 – April 2016 Submit Documentation Feedback TPD1E04U04 Evaluation Module Copyright © 2016, Texas Instruments Incorporated 3 Setup www.ti.com ESD Simulator DUT or System Typical Position for Direct Discharge Power and Ground Connection Horizontal Coupling Plane (HCP) To Wall Ground Insulation 470 kO 470 kO Ground Reference Plane Non-conducting Table Figure 2. System Level ESD Test Setup 3.1.2 Evaluation of Test Results Connect the tested device on the EVM to a curve tracer both before and after ESD testing. After each incremental level, if the IV-curve of the ESD protection diode shifts ±0.1 V, or leakage current increases by a factor of ten, then the device is permanently damaged by ESD. 3.2 Scattering Parameters A TPD1E04U04 (D6) is configured with 2 SMA (J1 and J2) connectors to allow 2-port analysis with a vector network analyzer. Connect Port 1 to J1 and Port 2 to J2. This configuration allows for the following terminology in 2-port analysis: • S11: Return loss • S21: Insertion loss 3.3 ±8-kV ESD Clamping Waveforms A TPD1E04U04 (D6) has two SMA connectors (J1 and J2) which can be used for capturing clamping waveforms with an oscilloscope during an ESD strike. Caution must be taken when capturing clamping waveforms during an ESD event so as not to damage the oscilloscope. The following procedures outlines a proper method. 4 TPD1E04U04 Evaluation Module SLVUAN8 – April 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Setup www.ti.com 3.3.1 Oscilloscope Setup Without a proper procedure, capturing ESD clamping waveforms exposes the oscilloscope to potential voltages higher than the rating of the equipment. Proper methodology can mitigate any risk in this operation. Recommended Measurement Equipment: • One 2-GHz bandwidth (minimum of 1 GHz) oscilloscope. • Two 10X 50-Ω attenuators • One 50-Ω shielded SMA cable. Procedure In order to protect the oscilloscope, attenuation of the measured signal is required. Here is a procedure for testing D3: 1. Ground the EVM using the banana connector J3. 2. Attach two 10X attenuators in series to the oscilloscope channel being used. 3. Attach the 50-Ω shielded SMA cable between J2 and the attenuators. 4. Set the scope attenuation factor to 100X. 5. Set the oscilloscope to trigger on a positive edge for (+) ESD and a negative edge for (–) ESD strikes. The trigger voltage magnitude should be set to 20 V. 6. Following Section 3.1.1, strike contact ESD to J1.Pin1. Recommended settings for the time axis is 20 ns/div and for the voltage axis is 10 V division. The voltage levels of the ESD applied to J1.Pin1 should not exceed ±8 kV while capturing clamping waveforms. SLVUAN8 – April 2016 Submit Documentation Feedback TPD1E04U04 Evaluation Module Copyright © 2016, Texas Instruments Incorporated 5 Board Layout 4 www.ti.com Board Layout This section provides the TPD1E04U04EVM board layout. TPD1E04U04EVM is a 4-layer board of FR408HR at 0.062 inch thickness. Layers 2, 3, and 4 are ground planes and not shown here. Figure 3. TPD1E04U04EVM Top Layer and Silkscreen 5 Schematics Figure 4. TPD1E04U04EVM Schematic 6 TPD1E04U04 Evaluation Module SLVUAN8 – April 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Bill of Materials www.ti.com 6 Bill of Materials Table 3. Bill of Materials Count RefDes Description Package Reference Part Number MFR 6 D1, D2, D3, D4, D5, D6 1-Channel ESD Protection Device for Super-Speed (up to 6 Gbps) Interface, DPY0002A DPY0002A TPD1E04U04DPY Texas Instruments 2 J1, J2 Connector, TH, End launch SMA 50 Ω Connector, TH, End launch SMA 142-0761-881 Johnson 1 J3 Standard Banana Jack, Insulated, Black 6092 6092 Keystone SLVUAN8 – April 2016 Submit Documentation Feedback TPD1E04U04 Evaluation Module Copyright © 2016, Texas Instruments Incorporated 7 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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