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5V50015PGG8

5V50015PGG8

  • 厂商:

    IDT

  • 封装:

  • 描述:

    5V50015PGG8 - LOW EMI CLOCK GENERATOR - Integrated Device Technology

  • 数据手册
  • 价格&库存
5V50015PGG8 数据手册
DATASHEET LOW EMI CLOCK GENERATOR Description The IDT5V50015 generates a low EMI output clock from a clock or crystal input. The part is designed to dither the LCD interface clock for PDAs, printers, scanners, modems, copiers, and others. Using IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB. IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to remove crystals and oscillators from your board. IDT5V50015 Features • • • • Packaged in 8-pin SOIC/TSSOP Provides a spread spectrum output clock 135 MHz to 200 MHz operation Accepts a clock input (provides same frequency dithered output) • Center spread modulation • Peak reduction by 8 dB to 16 dB typical on 3rd through 19th odd harmonics • Low EMI feature can be disabled • Operating voltage of 3.3 V • Advanced, low-power CMOS process Block Diagram VDD S1:0 SSCC 2 PLL Clock Synthesis and Spread Spectrum Circuitry SSCLK ICLK GND IDT™ LOW EMI CLOCK GENERATOR 1 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Pin Assignment ICLK VDD GND SSCLK 1 2 3 4 8 7 6 5 VDD S0 S1 SSCC Spread Direction and Percentage Select Table S1 Pin 6 S0 Pin 7 Spread Direction Spread Percentage 0 0 1 1 0 1 0 1 Center Center Center Center ±0.5 ±1.0 ±1.5 ±2.0 8 pin (150 mil) SOIC/TSSOP 0 = connect to GND 1 = connect directly to VDD Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 2 3 4 5 6 7 8 ICLK VDD GND SSCLK SSCC S1 S0 VDD Input Power Power Output Input Input Input Power Connect to a 130–200 MHz clock input. Connect to +3.3 V. Connect to ground. Clock output with spread spectrum. Spread spectrum enable/disable function. SSCC function is enabled when input is high and disabled when input is low. This pin is pulled high internally. Function select 1 input. Selects spread amount and direction per table above. Internal pull-down. Function select 0 input. Selects spread amount and direction per table above. Internal pull-down. Connect to +3.3 V. IDT™ LOW EMI CLOCK GENERATOR 2 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG External Components The IDT5V50015 requires a minimum number of external components for proper operation. Spread Spectrum Profile The IDT5V50015 low EMI clock generator uses an optimized frequency slew rate algorithm to facilitate down stream tracking of zero delay buffers and other PLL devices. The frequency modulation amplitude is constant with variations of the input frequency. Decoupling Capacitor A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 2 and 3, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Modulation Rate Series Termination Resistor When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50Ω trace (a commonly used trace impedance) place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω . Frequency Time PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 33Ω series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the IDT5V50015. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. IDT™ LOW EMI CLOCK GENERATOR 3 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the IDT5V50015. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70° C -65 to +150° C 125° C 260° C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +3.0 Typ. Max. +70 3.6 Units °C V Thermal Characteristics for 8TSSOP Parameter Thermal Resistance Junction to Ambient Symbol θJA θJA θJA θJC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 110 100 80 35 Max. Units ° C/W ° C/W ° C/W ° C/W Thermal Resistance Junction to Case Thermal Characteristics for 8SOIC Parameter Thermal Resistance Junction to Ambient Symbol θJA θJA θJA θJC ΨJT Conditions Still air 1 m/s air flow 3 m/s air flow Still air Min. Typ. 150 140 120 40 20 Max. Units ° C/W ° C/W ° C/W ° C/W ° C/W Thermal Resistance Junction to Case Thermal Resistance Junction to Top of Case IDT™ LOW EMI CLOCK GENERATOR 4 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +70° C Parameter Operating Voltage Supply Current Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Capacitance Pull-down Resistance Pull-up Resistance Note 1: CL = 15 pF. Symbol VDD IDD VIH VIL VOH VOL CIN1 RPD RPU Conditions ICLK=150 MHz, Note 1 ICLK=200 MHz, Note 1 S1: S0 S1: S0 IOH = -6 mA IOH =- 20 mA IOL = 6 mA IOL = 20 mA All inputs S1, S0 SSCC Min. 3.0 Typ. 3.3 40 50 Max. 3.6 Units V mA mA V 2.0 0.8 2.4 2.0 0.4 1.2 3 4 240 240 5 V V V V V pF kΩ kΩ AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +70° C Parameter Input Clock Frequency Output Clock Frequency Output Clock Duty Cycle Cycle to cycle Jitter Output Rise Time Output Fall Time Modulation Frequency Symbol Conditions Min. 135 135 Typ. Max. Units 200 200 MHz MHz % ps ps ns ns kHz All outputs ICLK=150 MHz, SS on ICLK=200 MHz, SS on tR tF 20% to 80%, CL=15 pF, 150 MHz 80% to 20%, CL=15 pF, 150 MHz ICLK=200 MHz ICLK=150 MHz ICLK=130 MHz 47 50 50 75 0.9 0.9 51.2 38.4 32 53 100 100 IDT™ LOW EMI CLOCK GENERATOR 5 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Package Outline and Package Dimensions (8-pin TSSOP) Package dimensions are kept current with JEDEC Publication No. 95 8 Millimeters Symbol Min Max Inches Min Max E1 IN D E X AREA E 1 2 D A A1 A2 b C D E E1 e L α aaa -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 2.90 3.10 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0° 8° 0.10 -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.114 0.122 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0° 8° 0.004 A 2 A 1 A c -Ce b S E A T IN G P LA N E L aaa C IDT™ LOW EMI CLOCK GENERATOR 6 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Symbol Min Max Inches Min Max 8 E INDEX AREA H 12 D A A1 B C D E e H h L α 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° A A1 h x 45 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number 5V50015PGG 5V50015PGG8 5V50015DCG 5V50015DCG8 Marking TBD Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 8-pin TSSOP 8-pin TSSOP 8-pin SOIC 8-pin SOIC Temperature 0 to +70° 0 to +70° 0 to +70° 0 to +70° C C C C Parts that are ordered with a "G" after the two-letter package code are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ LOW EMI CLOCK GENERATOR 7 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Revision History Rev. E F Originator Date 01/28/09 03/11/09 Description of Change Release to final. Changed minimum input frequency from 130 to 135 MHz. IDT™ LOW EMI CLOCK GENERATOR 8 IDT5V50015 REV F 031109 IDT5V50015 LOW EMI CLOCK GENERATOR SSCG Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA
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