LT1011AMH

LT1011/LT1011A Voltage Comparator U Response Time vs Overdrive 500 450 16 17 19 6012 12-BIT D/A CONVERTER INPUT 0V TO 10V R4* 2.49k R6 820Ω PARALLEL OUTPUTS 4 5V 24 E 12 START CLOCK f = 1.4MHz 1011 TA01 FEATURES s s s s s s s s s DESCRIPTIO Pin Compatible with LM111 Series Devices Guaranteed Max 0.5mV Input Offset Voltage Guaranteed Max 25nA Input Bias Current Guaranteed Max 3nA Input Offset Current Guaranteed Max 250ns Response Time Guaranteed Min 200,000 Voltage Gain 50mA Output Current Source or Sink ±30V Differential Input Voltage Fully Specified for Single 5V Operation APPLICATIO S s s s s s s s SAR A/D Converters Voltage-to-Frequency Converters Precision RC Oscillator Peak Detector Motor Speed Control Pulse Generator Relay/Lamp Driver , LTC and LT are registered trademarks of Linear Technology Corporation. The LT ®1011 is a general purpose comparator with significantly better input characteristics than the LM111. Although pin compatible with the LM111, it offers four times lower bias current, six times lower offset voltage and five times higher voltage gain. Offset voltage drift, a previously unspecified parameter, is guaranteed at 15µV/°C. Additionally, the supply current is lower by a factor of two with no loss in speed. The LT1011 is several times faster than the LM111 when subjected to large overdrive conditions. It is also fully specified for DC parameters and response time when operating on a single 5V supply. These parametric improvements allow the LT1011 to be used in high accuracy (≥ 12-bit) systems without trimming. In a 12-bit A/D application, for instance, using a 2mA DAC, the offset error introduced by the LT1011 is less than 0.5LSB. The LT1011 retains all the versatile features of the LM111, including single 3V to ±18V supply operation, and a floating transistor output with 50mA source/sink capability. It can drive loads referenced to ground, negative supply or positive supply, and is specified up to 50V between V – and the collector output. A differential input voltage up to the full supply voltage is allowed, even with ±18V supplies, enabling the inputs to be clamped to the supplies with simple diode clamps. TYPICAL APPLICATIO R1 1k FULL-SCALE TRIM R2* 6.49k 15V 20 14 LM329 7V R3 6.98k 15 10µs 12-Bit A/D Converter 3.9k 15V *R2 AND R4 SHOULD TC TRACK –15V 0.001µF 5V R5 1k RESPONSE TIME (ns) 13 12 11 10 9 PARALLEL OUTPUTS 5 6 7 8 7 6 5 4 8 9 16 17 18 19 20 21 D CC CP S AM2504 SAR REGISTER S U U 400 350 300 250 200 150 100 50 FALLING OUTPUT RISING OUTPUT 18 3 2 1 2 + LT1011A 7 3 – SERIAL OUTPUT 7475 LATCH 0 0.1 1 10 OVERDRIVE (mV) 100 1011 TA02 1 LT1011/LT1011A ABSOLUTE MAXIMUM RATINGS Supply Voltage (Pin 8 to Pin 4) .............................. 36V Output to Negative Supply (Pin 7 to Pin 4) LT1011AC, LT1011C .......................................... 40V LT1011AI, LT1011I ............................................ 40V LT1011AM, LT1011M (OBSOLETE) .............. 50V Ground to Negative Supply (Pin 1 to Pin 4) ............ 30V Differential Input Voltage ...................................... ± 36V Voltage at STROBE Pin (Pin 6 to Pin 8) .................... 5V PACKAGE/ORDER INFORMATION TOP VIEW V+ 8 GND 1 INPUT 2 INPUT 3 + – ORDER PART NUMBER 7 OUTPUT 6 BALANCE/ STROBE 5 BALANCE 4 V– H PACKAGE 8-LEAD TO-5 METAL CAN LT1011ACH LT1011CH LT1011AMH LT1011MH TJMAX = 150°C, θJA = 150°C/ W, θJC = 45°C/ W OBSOLETE PACKAGES Consider the N8 or S8 Packages for Alternate Source Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL VOS PARAMETER Input Offset Voltage *Input Offset Voltage IOS IB *Input Offset Current Input Bias Current *Input Bias Current CONDITIONS (Note 4) The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, RS = 0Ω, V1 = – 15V, output at pin 7 unless otherwise noted. LT1011AC/AI/AM MIN TYP MAX 0.3 q RS ≤ 50k (Note 5) q (Note 5) q (Note 4) (Note 5) q *Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5. 2 U U W WW U W (Note 1) Input Voltage (Note 2) ....................... Equal to Supplies Output Short-Circuit Duration .............................. 10 sec Operating Temperature Range (Note 3) LT1011AC, LT1011C ............................... 0°C to 70°C LT1011AI, LT1011I ........................... – 40°C to 85°C LT1011AM, LT1011M (OBSOLETE) – 55°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C TOP VIEW GND 1 INPUT 2 INPUT 3 V– 4 N8 PACKAGE 8-LEAD PDIP + – ORDER PART NUMBER 8 7 6 5 V+ OUTPUT BALANCE/ STROBE BALANCE S8 PACKAGE 8-LEAD PLASTIC SO LT1011ACN8 LT1011CN8 LT1011CS8 LT1011AIS8 LT1011IS8 S8 PART MARKING 1011 1011AI 1011I ORDER PART NUMBER LT1011ACJ8 LT1011AMJ8 LT1011CJ8 LT1011MJ8 TJMAX = 150°C, θJA = 130°C/ W(N8) TJMAX = 150°C, θJA = 150°C/ W(S8) J8 PACKAGE 8-LEAD CERDIP TJMAX = 150°C, θJA = 100°C/ W(J8) LT1011C/I/M MIN TYP MAX 0.6 1.5 3.0 2.0 3.0 0.2 20 25 4 6 50 65 80 UNITS mV mV mV mV nA nA nA nA nA 0.5 1.0 0.75 1.50 0.2 15 20 3 5 25 35 50 LT1011/LT1011A The q denotes the specifications which apply over the full operating temperature range, otherwide specifications are at TA = 25°C. VS = ±15V, VCM = 0V, RS = 0Ω, V1 = – 15V, output at pin 7 unless otherwise noted. SYMBOL ∆VOS ∆T AVOL PARAMETER Input Offset Voltage Drift (Note 6) *Large-Signal Voltage Gain CONDITIONS TMIN ≤ T ≤ TMAX RL = 1k to 15V, –10V ≤ VOUT ≤ 14.5V RL = 500Ω to 5V, 0.5V ≤ VOUT ≤ 4.5V CMRR Common Mode Rejection Ratio *Input Voltage Range (Note 9) tD VOL *Response Time *Output Saturation Voltage, V1 = 0 *Output Leakage Current *Positive Supply Current *Negative Supply Current *Strobe Current (Note 8) Input Capacitance Minimum to Ensure Output Transistor is Off 500 6 VS = ±15V VS = Single 5V (Note 7) VIN = 5mV, ISINK = 8mA, TJ ≤ 100°C VIN = 5mV, ISINK = 8mA VIN = 5mV, ISINK = 50mA VIN = 5mV, V1 = –15V, VOUT = 35V (25V for LT1011C/I) q q q q q q ELECTRICAL CHARACTERISTICS LT1011AC/AI/AM MIN TYP MAX 4 200 50 94 –14.5 0.5 150 0.25 0.25 0.70 0.2 3.2 1.7 500 300 115 13 3 250 0.40 0.45 1.50 10 500 4.0 2.5 15 LT1011C/I/M MIN TYP MAX 4 200 50 90 –14.5 0.5 150 0.25 0.25 0.70 0.2 3.2 1.7 500 6 500 300 115 13 3 250 0.40 0.45 1.50 10 500 4.0 2.5 25 UNITS µV/°C V/mV V/mV dB V V ns V V V nA nA mA mA µA pF *Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Inputs may be clamped to supplies with diodes so that maximum input voltage actually exceeds supply voltage by one diode drop. See Input Protection in the Applications Information section. Note 3: TJMAX = 150°C. Note 4: Output is sinking 1.5mA with VOUT = 0V. Note 5: These specifications apply for all supply voltages from a single 5V to ±15V, the entire input voltage range, and for both high and low output states. The high state is ISINK ≥ 100µA, VOUT ≥ (V + – 1V) and the low state is ISINK ≤ 8mA, VOUT ≤ 0.8V. Therefore, this specification defines a worst-case error band that includes effects due to common mode signals, voltage gain and output load. Note 6: Drift is calculated by dividing the offset voltage difference measured at min and max temperatures by the temperature difference. Note 7: Response time is measured with a 100mV step and 5mV overdrive. The output load is a 500Ω resistor tied to 5V. Time measurement is taken when the output crosses 1.4V. Note 8: Do not short the STROBE pin to ground. It should be current driven at 3mA to 5mA for the shortest strobe time. Currents as low as 500µA will strobe the LT1011A if speed is not important. External leakage on the STROBE pin in excess of 0.2µA when the strobe is “off” can cause offset voltage shifts. Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.” 3 LT1011/LT1011A TYPICAL PERFOR A CE CHARACTERISTICS Input Bias Current 45 40 35 IB FLOWS OUT OF INPUTS 0.9 0.8 0.7 EQUIVALENT OFFSET VOLTAGE (mV) CURRENT (nA) 25 20 15 10 5 0 – 50 – 25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G01 CURRENT (nA) 30 Input Characteristics* 5 0 –5 INPUT CURRENT (nA) COMMON MODE VOLTAGE (V) –10 –15 – 20 – 25 – 30 – 35 – 40 0 5 10 – 20 –15 –10 – 5 INPUT VOLTAGE (V) 15 20 –1.5 – 2.0 REFERRED TO SUPPLIES 0.4 0.3 0.2 0.1 V– – 50 – 25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G05 OUTPUT VOLTAGE (V) *EITHER INPUT. REMAINING INPUT GROUNDED. CURRENT FLOWS OUT OF INPUT. VS = ± 15V Response Time—Collector Output 6 5 4 3 2 1 0 VS = ± 15V OVERDRIVE 20mV 5mV 2mV 6 5 4 15V VIN 5V 500Ω SATURATION VOLTAGE (V) – + –15V 100mV 0 0 INPUT = 100mV STEP 50 100 150 200 250 300 350 400 450 TIME (ns) 1011 G07 4 UW 1011 G04 Input Offset Current 100 Worst-Case Offset Error LM311 (FOR COMPARISON) 10 LT1011M LT1011C 1 LT1011AM LT1011AC 0.6 0.5 0.4 0.3 0.2 0.1 0 – 50 – 25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G01 0.1 1k 10k 100k SOURCE RESISTANCE (Ω) 1M 1011 G03 Common Mode Limits V+ – 0.5 –1.0 POSITIVE LIMIT 40 50 Transfer Function (Gain) TA = 25°C COLLECTOR OUTPUT RL = 1k 30 20 NEGATIVE LIMIT 10 EMITTER OUTPUT RL = 600Ω – 0.3 0.1 0.3 – 0.1 DIFFERENTIAL INPUT VOLTAGE (mV) 0.5 0 – 0.5 1011 G06 Response Time—Collector Output VS = ± 15V VIN Collector Output Saturation Voltage 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 35 40 45 50 SINK CURRENT (mA) 1011 G09 15V 5V 500Ω PIN 1 GROUNDED TA = 125°C TA = 25°C – + –15V 3 2 1 0 OVERDRIVE 20mV 5mV 2mV TA = – 55°C 100mV 0 0 INPUT = 100mV STEP 50 100 150 200 250 300 350 400 450 TIME (ns) 1011 G08 LT1011/LT1011A TYPICAL PERFOR A CE CHARACTERISTICS Response Time Using GND Pin as Output 15 INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 10 5 0 –5 –10 –15 0 – 50 –100 V+ VIN VOUT 2k V – 10 5 0 –5 –10 –15 0 – 50 –100 0 1 VIN VOUT 2k V– SHORT-CIRCUIT CURRENT (mA) 20mV 5mV 2mV 0 1 2 TIME (µs) Supply Current vs Supply Voltage 5 6 5 CURRENT (mA) 4 CURRENT (mA) POSITIVE SUPPLY COLLECTOR OUTPUT “LO” 3 POSITIVE AND NEGATIVE SUPPLY COLLECTOR OUTPUT “HI” 4 3 2 1 POSITIVE SUPPLY COLLECTOR OUTPUT “LO” LEAKAGE CURRENT (A) 2 1 0 0 5 10 15 20 SUPPLY VOLTAGE (V) Output Saturation— Ground Output 5 REFERRED TO V + V + TO GROUND PIN VOLTAGE (V) + 4 2 8 LT1011 7 1 RL 4 V– VOUT SATURATION VOLTAGE (V) PROPAGATION DELAY (ns) 3 3 TJ = – 55°C TJ = 25°C TJ = 125°C 600 INPUT 2 0.2 0.1 0 TJ = – 55°C 400 1 200 0 0 10 30 40 20 OUTPUT CURRENT (mA) 50 1011 G16 0 1 5 6 2 3 4 INPUT OVERDRIVE (mV) 7 8 0 0 1 2 1011 G17 + 0.3 TJ = 25°C 2 – UW VS = ± 15V TA = 25°C 3 25 V+ Response Time Using GND Pin as Output 15 V+ Output Limiting Characteristics* 140 120 100 80 60 40 20 0 0 SHORT-CIRCUIT CURRENT TA = 25°C POWER DISSIPATION 0.7 0.6 POWER DISSIPATION (W) 0.5 0.4 0.3 0.2 0.1 0 20mV 5mV 2mV VS = ± 15V TA = 25°C *MEASURED 3 MINUTES AFTER SHORT 10 5 OUTPUT VOLTAGE (V) 15 1011 G12 4 1011 G10 2 TIME (µs) 3 4 1011 G11 Supply Current vs Temperature 10 –7 Output Leakage Current VS = ± 15V 10 –8 VOUT = 35V VGND = – 15V 10 –9 10 –10 POSITIVE AND NEGATIVE SUPPLY COLLECTOR OUTPUT “HI” 10 –11 50 25 75 0 TEMPERATURE (˚C) 100 125 25 45 65 85 TEMPERATURE (°C) 105 125 1011 G15 30 1011 G13 0 –50 –25 1011 G14 Output Saturation Voltage 0.6 0.5 TJ = 125°C 0.4 ISINK = 8mA 1000 Response Time vs Input Step Size VS = ± 15V RL = 500Ω TO 5V OVERDRIVE = 5mV 5V 3 500Ω 7 1 800 RISING INPUT FALLING INPUT 3 4567 INPUT STEP (V) 8 9 10 1011 G18 5 LT1011/LT1011A TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Common Mode Voltage 2.5 2.0 CHANGE IN VOS (mV/µA) TJ = 25°C INPUT OFFSET VOLTAGE (mV) 1.5 1.0 0.5 0 – 0.5 –1.0 –1.5 – 2.0 – 2.5 V – (OR GND WITH SINGLE SUPPLY) V – 0.1 0.2 0.3 0.4 0.5 0.6 0.7 COMMON MODE VOLTAGE (V) V+ 1011 G19 APPLICATIONS INFORMATION Preventing Oscillation Problems Oscillation problems in comparators are nearly always caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the comparator. This is especially true with high gain bandwidth comparators like the LT1011, which are designed for fast switching with millivolt input signals. The gain bandwidth product of the LT1011 is over 10GHz. Oscillation problems tend to occur at frequencies around 5MHz, where the LT1011 has a gain of ≈ 2000. This implies that attenuation of output signals must be at least 2000:1 at 5MHz as measured at the inputs. If the source impedance is 1kΩ, the effective stray capacitance between output and input must have a reactance of more than (2000)(1kΩ) = 2MΩ, or less than 0.02pF. The actual interlead capacitance between input and output pins on the LT1011 is less than 0.002pF when cut to printed circuit mount length. Additional stray capacitance due to printed circuit traces must be minimized by routing the output trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. Additional steps to ensure oscillation-free operation are: 1. Bypass the STROBE/BALANCE pins with a 0.01µF capacitor connected from Pin 5 to Pin 6. This eliminates stray capacitive feedback from the output to the BALANCE pins, which are nearly as sensitive as the inputs. 2. Bypass the negative supply (Pin 4) with a 0.1µF ceramic capacitor close to the comparator. 0.1µF can also be used for the positive supply (Pin 8) if the pullup load is tied to a separate supply. When the pull-up load is tied directly to Pin 8, use a 2µF solid tantalum bypass capacitor. 3. Bypass any slow moving or DC input with a capacitor (≥ 0.01µF) close to the comparator to reduce high frequency source impedance. 4. Keep resistive source impedance as low as possible. If a resistor is added in series with one input to balance source impedances for DC accuracy, bypass it with a capacitor. The low input bias current of the LT1011 usually eliminates any need for source resistance balancing. A 5kΩ imbalance, for instance, will create only 0.25mV DC offset. 5. Use hysteresis. This consists of shifting the input offset voltage of the comparator when the output changes state. Hysteresis forces the comparator to move quickly through its linear region, eliminating oscillations by “overdriving” the comparator under all input conditions. Hysteresis may be either AC or DC. AC techniques do not shift the apparent offset voltage 6 U W UW Offset Pin Characteristics 0.8 0.6 0.4 0.2 0 VOLTAGE ON PINS 5 AND 6 WITH RESPECT TO V + CHANGE IN VOS FOR CURRENT INTO PINS 5 OR 6 UPPER COMMON MODE + – (1.5V) LIMIT = V –150mV –100mV – 50mV 0 – 50 – 25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G20 U U LT1011/LT1011A APPLICATIONS INFORMATION INPUT OFFSET VOLTAGE (mV) of the comparator, but require a minimum input signal slew rate to be effective. DC hysteresis works for all input slew rates, but creates a shift in offset voltage dependent on the previous condition of the input signal. The circuit shown in Figure 1 is an excellent compromise between AC and DC hysteresis. 15V 2µF TANT + 8 C1 0.003µF 6 LT1011 57 1 4 –15V 0.1µF 1011 F01 INPUTS Figure 1. Comparator with Hysteresis This circuit is especially useful for general purpose comparator applications because it does not force any signals directly back onto the input signal source. Instead, it takes advantage of the unique properties of the BALANCE pins to provide extremely fast, clean output switching even with low frequency input signals in the millivolt range. The 0.003µF capacitor from Pin 6 to Pin 8 generates AC hysteresis because the voltage on the BALANCE pins shifts slightly, depending on the state of the output. Both pins move about 4mV. If one pin (6) is bypassed, AC hysteresis is created. It is only a few millivolts referred to the inputs, but is sufficient to switch the output at nearly the maximum speed of which the comparator is capable. To prevent problems from low values of input slew rate, a slight amount of DC hysteresis is also used. The sensitivity of the BALANCE pins to current is about 0.5mV input referred offset for each microampere of BALANCE pin current. The 15M resistor tied from OUTPUT to Pin 5 generates 0.5mV DC hysteresis. The combination of AC and DC hysteresis creates clean oscillation-free switching with very small input errors. Figure 2 plots input referred error versus switching frequency for the circuit as shown. Note that at low frequencies, the error is simply the DC hysteresis, while at high frequencies, an additional + 2 – 3 R2 15M RL OUTPUT U W U U 8 7 6 5 4 3 2 1 0 –1 –2 1 C8 TO C6 = 0.003µF OUTPUT “LO” TO “HI” OUTPUT “HI” TO “LO” (50kHz) (5kHz) 1000 1011 F02 10 100 TIME/FREQUENCY (µs) Figure 2. Input Offset Voltage vs Time to Last Transition error is created by the AC hysteresis. The high frequency error can be reduced by reducing CH, but lower values may not provide clean switching with very low slew rate input signals. Input Protection The inputs to the LT1011 are particularly suited to general purpose comparator applications because large differential and/or common mode voltages can be tolerated without damage to the comparator. Either or both inputs can be raised 40V above the negative supply, independent of the positive supply voltage. Internal forward biased diodes will conduct when the inputs are taken below the negative supply. In this condition, input current must be limited to 1mA. If very large (fault) input voltages must be accommodated, series resistors and clamp diodes should be used (see Figure 3). V+ R1** INPUTS D1 D2 R3* 300Ω 3 R4* 300Ω 2 – + 8 LT1011 4 R2** D3 D4 D1 TO D4: 1N4148 *MAY BE ELIMINATED FOR IFAULT ≤ 1mA **SELECT ACCORDING TO ALLOWABLE FAULT CURRENT AND POWER DISSIPATION V– 1011 F03 Figure 3. Limiting Fault Input Currents 7 LT1011/LT1011A APPLICATIONS INFORMATION The input resistors should limit fault current to a reasonable value (0.1mA to 20mA). Power dissipation in the resistors must be considered for continuous faults, especially when the LT1011 supplies are off. One final caution: lightly loaded supplies may be forced to higher voltages by large fault currents flowing through D1-D4. R3 and R4 limit input current to the LT1011 to less than 1mA when the input signals are held below V –. They may be eliminated if R1 and R2 are large enough to limit fault current to less than 1mA. Input Slew Rate Limitations The response time of a comparator is typically measured with a 100mV step and a 5mV to 10mV overdrive. Unfortunately, this does not simulate many real world situations where the step size is typically much larger and overdrive can be significantly less. In the case of the LT1011, step size is important because the slew rate of internal nodes will limit response time for input step sizes larger than 1V. At 5V step size, for instance, response time increases from 150ns to 360ns. See the curve “Response Time vs Input Step Size for more detail. If response time is critical and large input signals are expected, clamp diodes across the inputs are recommended. The slew rate limitation can also affect performance when differential input voltage is low, but both inputs must slew quickly. Maximum suggested common mode slew rate is 10V/µs. Strobing The LT1011 can be strobed by pulling current out of the STROBE pin. The output transistor is forced to an “off” state, giving a “hi” output at the collector (Pin 7). Currents as low as 250µA will cause strobing, but at low strobe currents, strobe delay will be 200ns to 300ns. If strobe current is increased to 3mA, strobe delay drops to about 60ns. The voltage at the STROBE pin is about 150mV below V + at zero strobe current and about 2V below V + for 3mA strobe current. Do not ground the STROBE pin. It must be current driven. Figure 4 shows a typical strobe circuit. Note that there is no bypass capacitor between Pins 5 and 6. This maximizes strobe speed, but leaves the comparator more sensitive to oscillation problems for slow, low V+ I1 0.5mA 15V 5V RL 7 1 6 4 –15 3k 1011 F04 8 U W U U – + 8 LT1011 OUTPUT TTL OR CMOS DRIVE (5V SUPPLY) Figure 4. Typical Strobe Circuit level inputs. A 1pF capacitor between the output and Pin 5 will greatly reduce oscillation problems without reducing strobe speed. DC hysteresis can also be added by placing a resistor from output to Pin 5. See step 5 under “Preventing Oscillation Problems.” The pin (6) used for strobing is also one of the offset adjust pins. Current flow into or out of Pin 6 must be kept very low (< 0.2µA) when not strobing to prevent input offset voltage shifts. Output Transistor The LT1011 output transistor is truly floating in the sense that no current flows into or out of either the collector or emitter when the transistor is in the “off” state. The equivalent circuit is shown in Figure 5. D1 D2 COLLECTOR (OUTPUT) Q1 R1 170Ω V– Q2 R2 470Ω OUTPUT TRANSISTOR EMITTER (GND PIN) 1011 F05 Figure 5. Output Transistor Circuitry LT1011/LT1011A APPLICATIONS INFORMATION In the “off” state, I1 is switched off and both Q1 and Q2 turn off. The collector of Q2 can be now held at any voltage above V – without conducting current, including voltages above the positive supply level. Maximum voltage above V – is 50V for the LT1011M and 40V for the LT1011C/I. The emitter can be held at any voltage between V + and V – as long as it is negative with respect to the collector. In the “on” state, I1 is connected, turning on Q1 and Q2. Diodes D1 and D2 prevent deep saturation of Q2 to improve speed and also limit the drive current of Q1. The R1/R2 divider sets the saturation voltage of Q2 and provides turn-off drive. Either the collector or emitter pin can be held at a voltage between V + and V –. This allows the remaining pin to drive the load. In typical applications, the emitter is connected to V – or ground and the collector drives a load tied to V + or a separate positive supply. When the emitter is used as the output, the collector is typically tied to V + and the load is connected to ground or V –. Note that the emitter output is phase reversed with respect to the collector output so that the “+” and “–” input designations must be reversed. When the collector is tied to V +, the voltage at the emitter in the “on” state is about 2V below V + (see curves). Input Signal Range The common mode input voltage range of the LT1011 is about 300mV above the negative supply and 1.5V below the positive supply, independent of the actual supply voltages (see curve in the Typical Performance Characteristics). This is the voltage range over which the output will respond correctly when the common mode voltage is applied to one input and a higher or lower signal is applied to the remaining input. If one input is inside the common mode range and one is outside, the output will be correct. If the inputs are outside the common mode range in opposite directions, the output will still be correct. If both inputs are outside the common mode range in the same direction, the output will not respond to the differential input; for temperatures of 25°C and above, the output will remain unconditionally high (collector output), for temperatures below 25°C, the output becomes undefined. TYPICAL APPLICATIONS Offset Balancing R2 3k Driving Load Referenced to Positive Supply V+ 3 V ++ RLOAD 7 1 4 V V OR GROUND 1011 TA05 R1 20k 5 2 V+ 6 8 7 + – LT1011 3 1011 TA03 V ++ CAN BE GREATER OR LESS THAN V + U 2 W U U U Driving Load Referenced to Negative Supply V+ 2 INPUTS* 3 8 LT1011 7 1 4 RLOAD V – + 8 LT1011 – + V 1011 TA06 *INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT 9 LT1011/LT1011A TYPICAL APPLICATIONS Strobing 2 + LT1011 7 INPUTS* 3 2 3 – 6 TTL STROBE 1k 1011 TA04 NOTE: DO NOT GROUND STROBE PIN Using Clamp Diodes to Improve Frequency Response* CURRENT MODE INPUT (DAC, ETC) 2 D1 VOLTAGE INPUT R1 GROUND OR LOW IMPEDANCE REFERENCE 1011 TA09 D2 3 *SEE CURVE, “RESPONSE TIME vs INPUT STEP SIZE” Noise Immune 60Hz Line Sync** 5V R2 75k 2VRMS TO 25VRMS 60Hz INPUT R1* 330k 5V 3 R3 1k – + 4 8 LT1011 7 1 R4 27k 1011 TA11 C1 0.22µF 2 R6 27k 5V R5 10k *INCREASE R1 FOR LARGER INPUT VOLTAGES **LT1011 SELF OSCILLATES AT ≈ 60Hz CAUSING IT TO “LOCK” ONTO INCOMING LINE SIGNAL 10 U Driving Ground Referred Load V+ 8 LT1011 7 1 4 V– L1 1011 TA07 Window Detector V+ HIGH LIMIT 2 V ++** – + + LT1011 7 RL 3 – 1 VIN 2 + LT1011 7 OUTPUT HIGH INSIDE “WINDOW” AND LOW ABOVE HIGH LIMIT OR BELOW LOW LIMIT *INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT **V ++ MAY BE ANY VOLTAGE ABOVE V –. PIN 1 SWINGS TO WITHIN ≈ 2V OF V++ LOW LIMIT 3 – 1 1011 TA08 Crystal Oscillator 5V + LT1011 7 OUTPUT 2 85kHz 100pF 3 10k – + – 1 8 LT1011 4 7 1k 50k OUT 10k 10k 1011 TA10 High Efficiency** Motor Speed Controller 15V C1 50µF + R1 1k Q1 2N6667 1N4002 OUTPUT 60Hz MOTOR-TACH GLOBE 397A120-2 R2 470Ω 15V 8 R3* 10k MOTOR TACH R5 100k C2* 0.1µF R4 1k C3 0.1µF R6 2k R7 1k 1011 TA12 + 7 1 LT1011 2 – 3 4 *R3/C2 DETERMINES OSCILLATION – 5V TO FREQUENCY OF CONTROLLER –15V 0V TO 10V **Q1 OPERATES IN SWITCH MODE INPUT LT1011/LT1011A TYPICAL APPLICATIONS Combining Offset Adjust and Strobe V+ 5k 10k 2RH** RH* 6 20k 5 LT1011 7 *HYSTERESIS IS ≈ 0.45mV/µA OF CURRENT CHANGE IN RH RL **THIS RESISTOR CAUSES HYSTERESIS TO BE CENTERED AROUND VOS 1011 TA15 5 20k 6 LT1011 1011 TA13 Direct Strobe Drive When CMOS* Logic Uses Same V + Supply as LT1011 V+ 8 ** 6 LT1011 1011 TA14 C1 0.015µF *NOT APPLICABLE FOR TTL LOGIC Positive Peak Detector 15V 2k INPUT 3 8 LT1011 2 4 1M** –15V *MYLAR **SELECT FOR REQUIRED RESET TIME CONSTANT 1 7 2 10k* 10k* 15V *1% METAL FILM 10k* **TRW TYPE MTR-5/120ppm/°C, 25k ≤ RS ≤ 200k C1: 0.015µF = POLYSTYRENE, –120ppm/°C, 1011 TA16 ± 30ppm WESCO TYPE 32-P NOTE: COMPARATOR CONTRIBUTES ≤10ppm/°C DRIFT FOR FREQUENCIES BELOW 10kHz † LOW DRIFT AND ACCURATE FREQUENCY ARE OBTAINED BECAUSE THIS CONFIGURATION REJECTS EFFECTS DUE TO INPUT OFFSET VOLTAGE AND BIAS CURRENT OF THE COMPARATOR + LT1008 6 OUTPUT 10k 3 + – C1* 2µF 100pF 8 1011 TA17 Negative Peak Detector 15V 1M** 3 – + 4 8 LT1011 7 1 10k 3 2k INPUT 2 + C1* 2µF 100pF –15V *MYLAR **SELECT FOR REQUIRED RESET TIME CONSTANT + 1k – U Combining Offset Adjustment and Hystersis V+ TTL OR CMOS 5V + + – – 1 Low Drift R/C Oscillator † 15V 2 15V 1k 7 4 74HC04 ×6 BUFFERED OUTPUT + – 1 8 LT1011 3 2 – LT1008 6 OUTPUT + 8 1011 TA18 11 LT1011/LT1011A TYPICAL APPLICATIONS 4-Digit (10,000 Count) A/D Converter 15V ZERO TRIM INPUT 0V TO 10V C4 0.01µF R5 4.7k 2 15V 8 C5 0.01µF 6 LT1011 3 R7 22Ω 1 4 –15V 15V C1* 0.1µF C2** 15pF C3 0.1µF R11 6.8K 7 CLOCK 1MHz OUTPUT = 1 COUNT PER mV, f = 1MHz 5V R6 4.7K R1 1k R2 18k 1 3 5V R3 3.9k R4 5.6k 8 LF398 7 4 25 6 D1 D2 –15V R8 3k 15V START ≥ 12ms TH ≥ [CMAX (pF)][1µs/pF] TL ≥ 10 • CMAX • (1µs/pF) TTL OR CMOS (OPERATING ON 5V) D1 R2 R1 100k 5k R3 86.6k GAIN ADJ 5V 8 2 0.01µF 6 LT1011 3 C** D3† 10µF† 1011 TA20 + 10µF† 12 + D2† U D3 D4 + – R10 1k R9 FULL-SCALE 3.65k TRIM 2N3904 R12 6.8k C6 50pF LM329 ALL DIODES: 1N4148 *POLYSTYRENE **NPO 1011 TA19 Capacitance to Pulse Width Converter + – 4 R5 4.7k OUTPUT 1µs/pF *PW = (R2 + R3)(C) R1 + R4 , INPUT CAPACITANCE OF R1 LT1011 IS ≈ 6pF. THIS IS AN OFFSET TERM. **TYPICAL 2 SECTIONS OF 365pF VARIABLE CAPACITOR WHEN USED AS SHAFT ANGLE INDICATION †THESE COMPONENTS MAY BE ELIMINATED IF ( ) 7 1 NEGATIVE SUPPLY IS AVAILABLE (–1V TO –15V) LT1011/LT1011A TYPICAL APPLICATIONS Fast Settling* Filter 100pF VIN 4.7k –15V 15V 0.1µF 100k 2 4 OFM-1A** 1µF 3 10k 0.033µF 5V AC INPUT 100Ω 5k ZERO CROSS TRIM 2 5V 1k 7 5V 74C04 820Ω 12k HP5082-2800 ×4 RECTIFIED OUTPUT 820Ω 74C04 – 5V 12k – 5V 1011 TA23 U – + + – 1M 15V 2 1M 4.7k 3 1 4 7 LT1008C 8 6 OUTPUT –15V 8 LT1011 71 5 6 15V 5k 6 51 7 8 4 –15V 15V 1011 TA21 100pF 1.5k 15V 5k THRESHOLD LT1011 100kHz Precision Rectifier 5V + – 4 8 LT1011 3 1 – 5V 5V – 5V 1k 13 LT1011/LT1011A SCHE ATIC DIAGRA OFFSET 5 Q6 R27 3k Q31 R5 160Ω R4 300Ω Q30 INPUT (+) 2 Q29 Q1 Q28 INPUT (–) 3 Q27 D7 D5 D6 D4 Q25 Q26 R25 1.6k R26 1.6k PACKAGE DESCRIPTION 0.335 – 0.370 (8.509 – 9.398) DIA 0.305 – 0.335 (7.747 – 8.509) 0.040 (1.016) MAX 0.050 (1.270) MAX SEATING PLANE 0.010 – 0.045* (0.254 – 1.143) 0.016 – 0.021** (0.406 – 0.533) *LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND 0.045" BELOW THE REFERENCE PLANE 0.016 – 0.024 **FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS (0.406 – 0.610) 14 U W OFFSET/STROBE 6 R8 800Ω R1 1.3k R2 1.3k Q10 R3 300Ω R23 4k Q11 Q5 R6 3.2k R7 3.2k Q8 Q3 Q20 R22 200Ω Q9 Q19 Q4 Q2 R17 200Ω R20 940Ω Q22 R19 500Ω R18 275Ω R21 960Ω R14 4.8k R15 700Ω Q18 R16 Q24 800Ω Q23 Q21 Q16 R24 400Ω R13 4Ω R12 470Ω Q7 Q14 R10 4k R11 170Ω OUTPUT 7 Q15 Q12 D1 D2 Q13 R9 800Ω V+ 8 1 GND D3 Q17 4 V– 1011 SD W Dimensions in inches (millimeters) unless otherwise noted. H Package 8-Lead TO-5 Metal Can (.230 Inch PCD) (Reference LTC DWG # 05-08-1321) OBSOLETE PACKAGE 45°TYP 0.165 – 0.185 (4.191 – 4.699) GAUGE PLANE REFERENCE PLANE 0.500 – 0.750 (12.700 – 19.050) 0.110 – 0.160 (2.794 – 4.064) INSULATING STANDOFF 0.028 – 0.034 (0.711 – 0.864) 0.027 – 0.045 (0.686 – 1.143) PIN 1 0.230 (5.842) TYP H8 (TO-5) 0.230 PCD 1197 LT1011/LT1011A PACKAGE DESCRIPTION 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.300 BSC (0.762 BSC) 0.008 – 0.018 (0.203 – 0.457) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) 0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) ( +0.035 0.325 –0.015 +0.889 8.255 –0.381 ) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 – 0.050 (0.406 – 1.270) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) CORNER LEADS OPTION (4 PLCS) 0.005 (0.127) MIN 0.405 (10.287) MAX 8 7 6 5 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.025 (0.635) RAD TYP 1 2 3 0.220 – 0.310 (5.588 – 7.874) 4 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0° – 15° 0.045 – 0.065 (1.143 – 1.651) 0.014 – 0.026 (0.360 – 0.660) 0.100 (2.54) BSC 0.125 3.175 MIN J8 1298 OBSOLETE PACKAGE N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) 0.130 ± 0.005 (3.302 ± 0.127) 0.400* (10.160) MAX 8 7 6 5 0.045 – 0.065 (1.143 – 1.651) 0.255 ± 0.015* (6.477 ± 0.381) 1 2 3 4 0.100 (2.54) BSC N8 1098 S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.053 – 0.069 (1.346 – 1.752) 8 0.004 – 0.010 (0.101 – 0.254) 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 7 6 5 0.050 (1.270) BSC 1 2 3 4 SO8 1298 15 LT1011/LT1011A TYPICAL APPLICATION 10Hz to 100kHz Voltage to Frequency Converter R7 4.7k 15V 15V R1 4.7k C1 0.002µF POLYSTYRENE 15V R2 5k FULL-SCALE R3 TRIM 8.06k C2 0.68µF R17† 22M 15V 3 R5 2k R6 2k R8 4.7k –15V 1.5µs 4.4V –15V R11 20k Q2 ALL DIODES 1N4148 TRANSISTORS 2N3904 *USED ONLY TO GUARANTEE START-UP † MAY BE INCREASED FOR BETTER 10Hz TRIM RESOLUTION R15 22k Q1* R14 1k R10 2.7k 15V R9 5k LT1009 2.5V INPUT 0V TO 10V 15V R16 50k 10Hz TRIM – 15V RELATED PARTS PART NUMBER LT1016 LT1116 LT1394 LT1671 DESCRIPTION UltraFastTM Precision Comparator 12ns Single Supply Ground-Sensing Comparator UltraFast Single Supply Comparator 60ns, Low Power Comparator COMMENTS Industry Standard 10ns Comparator Single Supply Version of the LT1016 7ns, 6mA Single Supply Comparator 450µA Single Supply Comparator UltraFast is a trademark of Linear Technology Corporation. 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q U R4 1M LINEARITY ≈ 0.01% – + 6 8 LT1011 7 1 4 –15V 0.002µF 15V 10pF 2 TTL OUTPUT 10HZ TO 100kHz 1.5µs R12 100k 1011 TA22 + 2µF R13 620k –15V sn1011 1011fbs LT/CP 0901 1.5K REV B • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 1991