MM5451N

MM5450 MM5451 LED Display Drivers February 1995 MM5450 MM5451 LED Display Drivers General Description The MM5450 and MM5451 are monolithic MOS integrated circuits utilizing N-channel metal-gate low threshold enhancement mode and ion-implanted depletion mode devices They are available in 40-pin molded or cavity dual-in-line packages The MM5450 MM5451 is designed to drive common anode-separate cathode LED displays A single pin controls the LED display brightness by setting a reference current through a variable resistor connected to VDD Features Y Y Y Y Y Y Y Y Y Applications Y Y Y Y Y COPSTM or microprocessor displays Industrial control indicator Relay driver Digital clock thermometer counter voltmeter Instrumentation readouts Continuous brightness control Serial data input No load signal required Enable (on MM5450) Wide power supply operation TTL compatibility 34 or 35 outputs 15 mA sink capability Alphanumeric capability iJA DIP Board e 49 C W Socket e 54 C W Block Diagram TL F 6136–1 FIGURE 1 COPSTM is a trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 6136 RRD-B30M105 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications VSS b 0 3V to VSS a 12V b 25 C to a 85 C Operating Temperature b 65 C to a 150 C Storage Temperature a 150 C Junction Temperature Lead Temperature (Soldering 10 sec ) 300 C Voltage at Any Pin Power Dissipation at a 25 C Molded DIP Package Board Mount Molded DIP Package Socket Mount 2 5W 2 3W Molded DIP Package board mount iJA e 49 C W Derate 20 4 mW C above 25 C Molded DIP Package socket mount iJA e 54 C W Derate 18 5 mW C above 25 C Electrical Characteristics Parameter Power Supply Power Supply Current Input Voltages Logical ‘‘0’’ Level (VL) Logical ‘‘1’’ Level (VH) Brightness Input (Note 2) Output Sink Current Segment OFF Segment ON TA within operating range VDD e 4 75V to 11 0V VSS e 0V unless otherwise specified Conditions Min 4 75 Typ Max 11 7 b0 3 Units V mA V V V mA mA mA mA mA V % kHz ns ns ns ns ns Excluding Output Loads g 10 mA Input Bias 4 75V s VDD s 5 25V VDD l 5 25V VDD b 2V 0 22 08 VDD VDD 0 75 10 VOUT e 3 0V VOUT e 1V (Note 3) Brightness Input e 0 mA Brightness Input e 100 mA Brightness Input e 750 mA Input Current 750 mA (Notes 5 and 6) 0 20 15 30 27 10 4 25 43 g 20 Brightness Input Voltage (Pin 19) Output Matching (Note 1) Clock Input Frequency fC High Time th Low Time tl Data Input Set-Up Time tDS Hold Time tDH Data Enable Input Set-Up Time tDES 500 950 950 300 300 100 Note 1 Output matching is calculated as the percent variation (IMAX a IMIN) 2 Note 2 With a fixed resistor on the brightness input pin some variation in brightness will occur from one device to another Maximum brightness input current can be 2 mA as long as Note 3 and junction temperature equation are complied with Note 3 See Figures 5 6 and 7 for Recommended Operating Conditions and limits Absolute maximum for each output should be limited to 40 mA Note 4 The VOUT voltage should be regulated by the user See Figures 6 and 7 for allowable VOUT vs IOUT operation Note 5 AC input waveform specification for test purpose tr s 20 ns tf s 20 ns f e 500 kHz 50% g 10% duty cycle Note 6 Clock input rise and fall times must not exceed 300 ns Connection Diagrams Dual-In-Line Package Dual-In-Line Package TL F 6136–2 TL F 6136–3 Top View Top View FIGURE 2b FIGURE 2a Order Number MM5450N MM5451N MM5450V or MM5451V See NS Package Number N40A or V44A 2 Connection Diagrams (Continued) Plastic Chip Carrier TL F 6136–13 Top View Plastic Chip Carrier TL F 6136–14 Top View 3 Functional Description Both the MM5450 and the MM5451 are specifically designed to operate 4- or 5-digit alphanumeric displays with minimal interface with the display and the data source Serial data transfer from the data source to the display driver is accomplished with 2 signals serial data and clock Using a format of a leading ‘‘1’’ followed by the 35 data bits allows data transfer without an additional load signal The 35 data bits are latched after the 36th bit is complete thus providing non-multiplexed direct drive to the display Outputs change only if the serial data bits differ from the previous time Display brightness is determined by control of the output current for LED displays A 0 001 capacitor should be connected to brightness control pin 19 to prevent possible oscillations A block diagram is shown in Figure 1 For the MM5450 a DATA ENABLE is used instead of the 35th output The DATA ENABLE input is a metal option for the MM5450 The output current is typically 20 times greater than the current into pin 19 which is set by an external variable resistor There is an internal limiting resistor of 400X nominal value There must be a complete set of 36 clocks or the shift registers will not clear When the chip first powers ON an internal power ON reset signal is generated which resets all registers and all latches The START bit and the first clock return the chip to its normal operation Figure 4 shows the input data format A start bit of logical ‘‘1’’ precedes the 35 bits of data At the 36th clock a LOAD signal is generated synchronously with the high state of the clock which loads the 35 bits of the shift registers into the latches At the low state of the clock a RESET signal is generated which clears all the shift registers for the next set of data The shift registers are static master-slave configuration There is no clear for the master portion of the first shift register thus allowing continuous operation Figure 2 shows the pin-out of the MM5450 and MM5451 Bit 1 is the first bit following the start bit and it will appear on pin 18 A logical ‘‘1’’ at the input will turn on the appropriate LED Figure 3 shows the timing relationships between data clock and DATA ENABLE A max clock frequency of 0 5 MHz is assumed For applications where a lesser number of outputs are used it is possible to either increase the current per output or operate the part at higher than 1V VOUT The following equation can be used for calculations Tj e (VOUT) (ILED) (No of segments)(iJA) a TA where Tj e junction temperature 150 C max VOUT e the voltage at the LED driver outputs ILED e the LED current iJA e thermal coefficient of the package TA e ambient temperature iJA (Socket Mount) e 54 C W iJA (Board Mount) e 49 C W The above equation was used to plot Figure 5 Figure 6 and Figure 7 TL F 6136–4 FIGURE 3 4 Functional Description (Continued) TL F 6136–5 FIGURE 4 Input Data Format Typical Performance Characteristics TL F 6136–7 TL F 6136 – 6 TL F 6136–8 FIGURE 5 FIGURE 6 FIGURE 7 Typical Applications I19 e DV 1k TL F 6136–9 FIGURE 8 Typical Application of Constant Current Brightness Control TL F 6136–10 FIGURE 9 Brightness Control Varying the Duty Cycle 5 Typical Applications (Continued) Basic Electronically Tuned Radio System TL F 6136–11 Duplexing 8 Digits with One MM5450 TL F 6136–12 6 Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number MM5450N or MM5451N NS Package Number N40A 7 MM5450 MM5451 LED Display Drivers Physical Dimensions inches (millimeters) (Continued) Plastic Chip Carrier (V) Order Number MM5450V or MM5451V NS Package Number V44A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications