HEF4539BN

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4539B MSI Dual 4-input multiplexer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Dual 4-input multiplexer DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to S1) and I0 to I3. When E is LOW, S0 and S1 determine which multiplexer input (I0 to I3) on each of the multiplexers is routed to the respective multiplexer output (O). HEF4539B MSI Fig.1 Functional diagram. PINNING I0A, I1A, I2A, I3A I0B, I1B, I2B, I3B S0, S1 EA, EB OA, OB Fig.2 Pinning diagram. multiplexer inputs multiplexer inputs select inputs enable inputs (active LOW) multiplexer outputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications HEF4539BP(N): HEF4539BD(F): HEF4539BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America January 1995 2 Philips Semiconductors Product specification Dual 4-input multiplexer HEF4539B MSI Fig.3 Logic diagram. FUNCTION TABLE INPUTS S0 X L H L H S1 X L L H H En H L L L L OUTPUT On L I0 I1 I2 I3 Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial January 1995 3 Philips Semiconductors Product specification Dual 4-input multiplexer AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays In → On HIGH to LOW 5 10 15 5 LOW to HIGH Sn → On HIGH to LOW 10 15 5 10 15 5 LOW to HIGH En → On HIGH to LOW 10 15 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL 120 45 30 120 50 35 165 65 40 155 60 40 100 40 30 100 40 30 60 30 20 60 30 20 240 90 60 245 100 65 330 125 80 310 120 80 200 80 55 200 80 55 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL MIN. TYP. MAX. HEF4539B MSI TYPICAL EXTRAPOLATION FORMULA 93 ns + (0,55 ns/pF) CL 34 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 93 ns + (0,55 ns/pF) CL 39 ns + (0,23 ns/pF) CL 27 ns + (0,16 ns/pF) CL 138 ns + (0,55 ns/pF) CL 54 ns + (0,23 ns/pF) CL 32 ns + (0,16 ns/pF) CL 128 ns + (0,55 ns/pF) CL 49 ns + (0,23 ns/pF) CL 32 ns + (0,16 ns/pF) CL 73 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 73 ns + (0,55 ns/pF) CL 29 ns + (0,23 ns/pF) CL 22 ns + (0,16 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL 10 ns + (1,0 ns/pF) CL 9 ns + (0,42 ns/pF) CL 6 ns + (0,28 ns/pF) CL VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (µW) 700 fi + ∑ (foCL) × VDD2 2900 fi + ∑ (foCL) × 8100 fi + ∑ (foCL) × VDD2 VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) APPLICATION INFORMATION Some examples of applications for the HEF4539B are: January 1995 * Data selectors 4 * Data multiplexers