STF15NM65N

STF15NM65N,STFI15NM65N N-channel 650 V, 0.35 Ω typ., 12 A MDmesh™ II Power MOSFETs in TO-220FP and I²PAKFP packages Datasheet - production data Features Order code 1 2 VDSS @Tjmax RDS(on) max. STF15NM65N 3 710 V 1 TO-220FP ID 0.38 Ω 12 A STFI15NM65N 2 3 • 100% avalanche tested 2 I PAKFP (TO-281) • Low input capacitance and gate charge • Low gate input resistance Applications • Switching applications Figure 1. Internal schematic diagram Description ' These devices are N-channel Power MOSFETs developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFETs associates a vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. * 6 $0Y Table 1. Device summary Order code Marking Packages STF15NM65N TO-220FP 15NM65N STFI15NM65N July 2016 This is information on a product in full production. Packing I2PAKFP (TO-281) DocID13853 Rev 4 Tube 1/15 www.st.com Contents STF15NM65N, STFI15NM65N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 2/15 ............................................... 8 4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 I2PAKFP (TO-281) package information . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DocID13853 Rev 4 STF15NM65N, STFI15NM65N 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter I2PAKFP TO-220FP Unit VDS Drain source voltage 650 V VGS Gate source voltage ± 25 V ID Drain current continuous Tc = 25 °C 12(1) A ID Drain current continuous Tc = 100 °C 7.56 A IDM(2) Drain current pulsed 48 A PTOT Total dissipation at Tc = 25 °C 30 W dv/dt(3) Peak diode recovery voltage slope 15 V/ns VISO Insulation withstand voltage (RMS from all three leads to external heatsink (t = 1 s; TC = 25 °C) 2500 V -55 to 150 °C TJ Operating junction temperature range Tstg Storage temperature range 1. Limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. ISD ≤12 A, di/dt ≤ 400 A/μs, VDSpeak ≤ V(BR)DSS, VDD = 80 % V(BR)DSS Table 3. Thermal data Value Symbol Parameters I2PAKFP TO-220FP Rthjc Rthj-amb Unit Thermal resistance junction-case 4.17 °C/W Thermal resistance junction-ambient 62.5 °C/W Value Unit 3 A 187 mJ Table 4. Avalanche characteristics Symbol Parameters IAS Avalanche current, repetitive or notrepetitive (pulse width limited by Tjmax) EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) DocID13853 Rev 4 3/15 15 Electrical characteristics 2 STF15NM65N, STFI15NM65N Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 5. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0, ID = 1 mA Min. Typ. Max. 650 Unit V VDD = 650 V, VGS=0 1 µA VDD = 650 V, VGS = 0 TC = 125 °C(1) 100 µA Gate body leakage VGS= ±25 V, VDS = 0 V ±100 nA VGS(th) Gate threshold voltage ID= 250 µA, VGS =VDS 3 4 V RDS(on) Static drain-source onresistance ID= 6 A, VGS= 10V 0.35 0.38 Ω lDSS Zero gate voltage drain current lGSS 2 1. Defined by design, not subject to production test Table 6. Dynamic Symbol Ciss Parameter Test conditions Min. Typ. Ma. Input capacitance VDS= 50 V, f = 1MHz, VGS= 0 V Coss Output capacitance Crss Reverse capacitance Unit - 983 - pF - 57 - pF - 4.5 - pF Equivalent output. capacitance VDS = 0 V to 520 V, VGS = 0 V - 146 - pF Rg Intrinsic gate resistance f = 1MHz ID = 0 A - 4.6 - Ω Qg Total gate charge - 33.3 - nC Qgs Gate source charge - 5.7 - nC Qgd Gate-drain charge - 17 - nC Cosseq (1) VDD= 520 V, ID=12 A, VGS= 10 V (see Figure 13: Gate charge test circuit) 1. Cross eq: defined as a constant equivalent capacitance giving the same charging time as COSS when V DS increases from 0 to 80 % VDSS. Table 7. Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD= 325 V, ID = 6 A Rg= 4.7 Ω, VGS = 10 V(see Figure 12: Switching times test circuit for resistive load and Figure 17: Switching time waveform) DocID13853 Rev 4 Min. Typ. Max. Unit - 55.5 - ns - 8.5 - ns - 14 - ns - 11.4 - ns STF15NM65N, STFI15NM65N Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source drain current - 12 A ISDM(1) Source drain current (pulsed) - 48 A VSD(2) Forward on voltage - 1.6 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 12 A, VGS = 0 V ISD = 12 A, di/dt = 100 A/µs VDD = 60 V(see Figure 14: Test circuit for inductive load switching and diode recovery times) ISD= 12 A, di/dt = 100 A/µs VDD = 60 V, Tj = 150 °C (see Figure 14: Test circuit for inductive load switching and diode recovery times) - 428 ns - 4.7 µC - 21.5 A - 570 ns - 6.2 µC - 22 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5 % DocID13853 Rev 4 5/15 15 Electrical characteristics 2.1 STF15NM65N, STFI15NM65N Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM10307v1 ID (A) is ea ) ar S(on D t R x in n ma io at by r pe ed O mit Li 10 s hi 1 10µs 100µs 1ms 10ms Tj=150°C Tc=25°C Single pulse 0.1 0.01 0.1 10 1 VDS(V) 100 Figure 4. Output characteristics Figure 5. Transfer characteristics AM10308v1 ID (A) AM10309v1 ID (A) VGS=10V 25 VDS=19V 25 6V 20 20 15 15 10 10 5V 5 0 0 5 0 0 4 6 8 10 12 14 16 18 20 22 VDS(V) 2 Figure 6. Static drain-source on-resistance AM10311v1 RDS(on) (Ω) 0.365 0.360 4 6 8 10 9*6 9 *,3'49* 9'6 9'6 9 9'' 9 ,' $   0.355    0.350  0.345 0.340  0.335  0.330 0 6/15 VGS(V) Figure 7. Gate charge vs gate-source voltage  VGS=10V 2 2 4 6 8 10 12 ID(A)   DocID13853 Rev 4           4JQ& STF15NM65N, STFI15NM65N Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature AM10313v1 C (pF) AM10314v1 VGS(th) (norm) 1000 1.10 Ciss ID=250µA 1.00 100 Coss 0.90 Crss 0.80 10 1 0.1 1 10 100 VDS(V) 0.70 -50 -25 25 0 50 75 100 TJ(°C) Figure 10. Normalized on-resistance vs temp. Source-drain diode forward characteristics AM10315v1 RDS(on) 2.1 1.9 AM10316v1 VSD (V) 1.4 (norm) TJ=-50°C ID=6A 1.2 TJ=25°C 1.7 1.0 1.5 0.8 TJ=150°C 1.3 0.6 1.1 0.9 0.4 0.7 0.2 0.5 -50 -25 0 0 25 50 75 100 0 TJ(°C) 2 4 6 8 10 12 ISD(A) Figure 11. Normalized VDS vs temperature AM09028v1 VDS (norm) ID=1mA 1.10 1.08 1.06 1.04 1.02 1.00 0.98 0.96 0.94 0.92 -50 -25 0 25 50 75 100 DocID13853 Rev 4 TJ(°C) 7/15 15 Test circuits 3 STF15NM65N, STFI15NM65N Test circuits Figure 12. Switching times test circuit for resistive load Figure 13. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 14. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 15. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/15 0 DocID13853 Rev 4 10% AM01473v1 STF15NM65N, STFI15NM65N 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID13853 Rev 4 9/15 15 Package information 4.1 STF15NM65N, STFI15NM65N TO-220FP package information Figure 18. TO-220FP package outline 7012510_Rev_K_B 10/15 DocID13853 Rev 4 STF15NM65N, STFI15NM65N Package information Table 9. TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID13853 Rev 4 11/15 15 Package information 4.2 STF15NM65N, STFI15NM65N I2PAKFP (TO-281) package information Figure 19. I2PAKFP (TO-281) package outline 5HY& 12/15 DocID13853 Rev 4 STF15NM65N, STFI15NM65N Package information Table 10. I2PAKFP (TO-281) package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 B 2.50 2.70 D 2.50 2.75 D1 0.65 0.85 E 0.45 0.70 F 0.75 1.00 F1 1.20 G 4.95 5.20 H 10.00 10.40 L1 21.00 23.00 L2 13.20 14.10 L3 10.55 10.85 L4 2.70 3.20 L5 0.85 1.25 L6 7.50 7.60 DocID13853 Rev 4 7.70 13/15 15 Revision history 5 STF15NM65N, STFI15NM65N Revision history Table 11. Document revision history Date Revision Changes 11-May-2011 1 Initial release. 21-Jun-2011 2 Document status promoted form preliminary data to datasheet, added Section 2.1: Electrical characteristics (curves). 17-Jul-2013 3 – – – – 25-Jul-2016 4 Added: I2PAKFP package Added: Table 10 and Figure 22 Updated: Section 4: Package information Minor text changes. The part number STP15NM65N has been moved to a separate datasheet. Minor text changes. 14/15 DocID13853 Rev 4 STF15NM65N, STFI15NM65N IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID13853 Rev 4 15/15 15