SIP43101DQ-T1-E3

SiP43101 Vishay Siliconix Dual Output Power Switch with Inverting Input FEATURES D D D D D D Two Output Power Switches Total Output Drive — 200 mA Continuous Pb-free Available 9-V to 35-V Supply Voltage Range Low Side or High Side Switch Configuration User Programmable Phasing of Output Switches Internal Output Over Voltage Clamp For Driving Inductive Loads D Current Limit Protection D Thermal Shutdown Protection D UVLO With User Programmable Time Delay APPLICATIONS D Optical Detectors for Factory Automation DESCRIPTION SiP43101 is a dual power switch IC which contains all control and power switching circuitry required to drive resistive and inductive loads in industrial applications. The output switches are NPN power transistors which can be configured as either high-side or low-side switches. These switches can operate from voltages as high as 35 V and have a continuous output current rating of 200 mA, combined or individually. Internal zener diodes are provided to clamp the power switch voltages to safe levels when driving inductive loads. The IN1 pin is a non-inverting input which controls the output of switch 1. A 2-input Exclusive OR gate input controls switch 2, allowing switch 2 to be controlled by either an inverting or non-inverting control signal. SiP43101 contains under voltage lockout, UVLO, a user definable turn on delay, current limit, short circuit protection, and thermal shutdown. The SiP43101 is available in both standard and lead (Pb)-free 16-pin TSSOP and PowerPAKr MLP-44 packages, which are specified over the industrial, D suffix (–40 to 85_C) tem– perature range. TYPICAL APPLICATION CIRCUIT +10 to 30 V 5V 100 nF SiP43101 1 kW R1 INPUT Load Load VCC FAULT C2 IN1 E2 IN2A R2 IN2B C1 CDEL E1 GND 100 nF GND Both Switches Configured as Low-Side, Switch 2 Inverted With Respect to Switch 1, R1 +R2 Set Logic High Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 1 SiP43101 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V C1-E1, C2-E2 (clamped by internal circuitry) . . . . . . . . . . . . . . . . . . . . . . 52 V Power Dissipation TSSOP-16a @ 85_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440 mW PowerPAK MLP44-16b @ 85_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 850 mW Output Current Continuous for one Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Peak for one Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 A Thermal Impedance (QJA) TSSOP-16c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90_C/W PowerPAK MLP44-16d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47_C/W C1, E1, C2, E2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V FAULT Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA FAULT Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V t0 VCC + 0.3 V IN1, IN2A, IN2B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V t0 VCC + 0.3 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C Notes a. Derate 11.1 mW/_C b. Derate 21.3 mW/_C c. Device mounted on JEDEC compliant two layer test board. d. Device mounted on JEDEC compliant four layer test board. Currents are positive into, negative out of the specificed terminal. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 to 32 V Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 to 85_C SPECIFICATIONS Test Conditions Unless Specified Parameter Symbol VCC = 25 V,IN1, IN2 = 0 V, IN1, IN2, INV2 = 5 V CDEL = 10 nF, TA = TJ Limits Mina Typb Maxa Unit Power Supply Supply Voltage VCC Supply Current ICC 9 –40 to 85_C, Both Inputs Enabled 6 32 V 9 mA Logic Inputs (IN1, IN2A, IN2B) Digital Input High Level VIH Digital Input Low Level VIL 3.5 1.5 Input Bias Current, Low Level IIL IN1, IN2A, IN2B = 0 V –0.40 Input Bias Current, High Level IIH IN1, IN2A, IN2B = 5 V 0.02 V mA Switches 1&2 – High Side Configuration Rise Time (Off to On) tr Rise Tiem (On to Off) tf RLOAD = 250 W to GND, GND C1 , C2 = 25 V RLOAD = 125 W to GND TA = 25 _C 1.3 1.5 VSATHS Current Limit ILIMHS RLOAD = 0.25 W to GND, TA = 25 _C ILHS E1, E2 = GND, C1 , C2 = 25 V,IN1, IN2A, IN2B = 0 V VCLHS Measure (VC1 – VE1) or (VC2 – VE2) Voltabe Clamp ns 300 TA = –40 _C Saturation Voltage Leakage Current 300 1.1 V A 5 52 mA V Switches 1&2 – Low Side Configuration Rise Time (On to Off) tr Rise Tiem (Off to On) tf RLOAD = 250 W to VCC, LOAD = 25 V to C1 , C2 RLOAD = 125 W to VCC TA = 25 _C 1.3 1.5 VSATLS Current Limit ILIMLS RLOAD = 0.25 W to VCC, TA = 25 _C ILLS E1, E2 = GND, C1 , C2 = 25 V,IN1, IN2A, IN2B = 0 V VCLLS Measure (VC1 – VE1) or (VC2 – VE2) Voltabe Clamp www.vishay.com 2 ns 350 TA = –40 _C Saturation Voltage Leakage Current 400 1.1 A 5 52 V mA V Document Number: 72640 S-51493, Rev. D—15-Aug-05 SiP43101 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Specified Parameter VCC = 25 V,IN1, IN2 = 0 V, IN1, IN2, INV2 = 5 V CDEL = 10 nF, TA = TJ Symbol Limits Mina Typb Maxa Unit Turn-On Delay CDEL Maximum Voltage CDEL Threshold VDEL 4.7 VDELTH 4 ICDEL 2.5 mA 0.4 V ICDEL V FAULT Output VCESAT Conducting State (On) Load on FAULT v 10 mA VSDON Operating Frequency Switching Frequency fSW 25 kHz Under Voltage Lockout UVLO Threshold VUVLO 7.5 8 8.5 UVLO Hysteresis VHYS 0.4 0.5 0.6 V Thermal Shutdown Thermal Shutdown Threshold Hysteresis T 160 THYS 20 _C Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (–40_ to 85_C). b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 12 V unless otherwise noted. PIN CONFIGURATION TSSOP-16 VCC FAULT CDEL NC 1 16 C2 2 15 NC 3 14 E2 4 13 NC 12 NC 6 11 E1 7 10 NC 8 9 Top View 5 GND IN2B IN2A IN1 TSSOPĆ16 ORDERING INFORMATION C1 Standard Part Number Lead (Pb)-Free Part Number Temperature Range Marking SiP43101DQ-T1 SiP43101DQ-T1—E3 –40 to 85_C 43101 PowerPAK MLP-44 C2 NC 13 14 VCC FAULT 15 16 E2 12 1 CDEL NC 11 2 GND NC 10 3 NC E1 9 4 IN2B 8 C1 7 6 5 NC IN1 IN2A PowerPAK MLPĆ44 ORDERING INFORMATION Standard Part Number Lead (Pb)-Free Part Number Temperature Range Marking SiP43101DLP-T1 SiP43101DLP-T1–E3 –40 to 85_C 43101 Bottom View Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 3 SiP43101 Vishay Siliconix PIN DESCRIPTION Pin Number TSSOP-16 MLP44-16 1 15 VCC 2 16 FAULT Name Function Positive Supply Voltage Open collector output that is switched low on in the event of Short Circuit or Thermal Shut Down. 3 1 CDEL 4, 10, 12, 13, 15 Connection for the external capacitor controlling the turn on delay. 3, 7, 10, 11, 14 NC 5 2 GND Ground Pin. 6 4 IN2B Input to the Exclusive OR controlling power switch 2. 7 5 IN2A Input to the Exclusive OR controlling power switch 2. 8 6 IN1 Input controlling power switch 1. 9 8 C1 Collector of power switch 1. 11 9 E1 Emitter of power switch 1. 14 12 E2 Emitter of power switch 2. 16 13 C2 Collector of power switch 2. No connection DETAILED PIN DESCRIPTION CDEL E1 A capacitor connected to this pin is used to set the duration the turn on delay. The delay starts after the UVLO threshold has been reached. This pin is the emitter of Switch 1. This pin is connected to the load in the High-Side Switch configuration, and is connected to Ground in the Low-Side configuration. E2 IN1 This pin controls the state of the output NPN switch 1. A Logic 0 holds the switch off while a Logic 1 turns the switch on. This pin is the emitter of switch 2. This pin is connected to the load in the High-Side switch configuration, and is connected to Ground in the Low-Side configuration. C1 IN2A, IN2B This pin is the collector of switch 1. This pin is connected to the VCC in the High-Side switch configuration, and is connected to the load in the Low-Side configuration. These pins are the inputs to the Exclusive OR gate that controls the state of the output NPN switch 2. This allows the use of either a non-inverting or an inverted signal to control the switch. Refer to the truth table for the logic function description. www.vishay.com 4 IN2A IN2B SWITCH 2 Low Low Off Low High On High Low On High High Off C2 This pin is the collector of switch 2. This pin is connected to the VCC in the High-Side switch configuration, and is connected to the load in the Low-Side configuration. FAULT This pin is an open collector output that is pulled to Ground in the event of a short circuit, an overcurrent, or a thermal shut down Document Number: 72640 S-51493, Rev. D—15-Aug-05 SiP43101 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VCC Reference C2 CDEL UVLO E2 Reset FAULT Control Logic C1 Short Citcuit Thermal Shut Down E1 IN2B IN2A IN1 GND DETAILED OPERATION Turn On Delay Short Circuit and Overcurrent indication The turn on delay prohibits the output switches from being turned on for a period of time after VCC has passed through 8 V and the undervoltage condition no longer exists. The UVLO function keeps the external CDEL capacitor discharged until VCC is greater than 8 V. Subsequently, an internal 2.5-mA current source charges the capacitor from GND to 4.7 V. A comparator detects when the voltage on CDEL passes through 4 V and enables the output switches. The delay time is a function of the capacitor value and is defined as 1.6 ms/nF. When an overcurrent or short circuit condition occurs on either switch, the SiP43101 enters a hiccup current limiting mode. In this mode, the capacitor on CDEL is discharged down to 3 V, thus turning off the output switches, and then is charged up to 4 V by a 2.5-mA internal current source, thus turning the switches on again. If the overcurrent or short circuit condition remains this cycle will continue. The switches are enabled at a very low duty cycle, minimizing the power dissipation and protecting the switches from damage. An external switch can be connected across the capacitor to disable the output switches and reset the time delay. The FAULT output will switch to GND, indicating that an overload condition or short circuit condition exists. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72640. Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 5 Package Information Vishay Siliconix PowerPAKr MLP44-16 (POWER IC ONLY) JEDEC Part Number: MO-220 D -B- ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ Index Area (Dń2 Eń2) 4 D/2 AA E/2 BB E -A- aaa C 2 X Detail A Top View // ccc C Nx 9 CC DD aaa C 2 X Seating Plane 0.08 C -C- Side View A A1 A3 D2 N L Detail B D2/2 Datum A or B N r E2/2 6 (NE-1) x e E2 2 Terminal Tip 1 Exposed Pad N b N N-1 Detail A e/2 5 Terminal Tip 5 e Even Terminal/Side 8 e 5 bbb M C A B (ND-1) x e 8 Odd Terminal/Side Detail B Bottom View Document Number: 72802 16-May-05 www.vishay.com 1 Package Information Vishay Siliconix PowerPAKr MLP44-16 (Power IC Only) JEDEC Part Number: MO-220 MILLIMETERS* Dim Min Nom A 0.80 0.90 A1 0 0.02 A3 − 0.20 Ref AA − 0.345 aaa − 0.15 BB − 0.345 b 0.25 0.30 bbb − 0.10 CC − 0.18 ccc − 0.10 D 4.00 BSC D2 2.55 2.7 DD − 0.18 E 4.00 BSC E2 2.55 2.7 e 0.65 BSC L 0.3 0.4 N 16 ND − 4 NE − 4 r b(min)/2 − * Use millimeters as the primary measurement. INCHES Max Min Nom Max 1.00 0.05 − − − − 0.35 − − − 0.0315 0 − − − − 0.0098 − − − 0.0394 0.0020 − − − − 0.138 − − − 2.8 − 0.1004 − 2.8 0.1004 0.5 0.0118 − − − − − b(min)/2 0.0354 0.0008 0.0079 0.0136 0.0059 0.0136 0.0118 0.0039 0.0071 0.0039 0.1575 BSC 0.1063 0.0071 0.1575 BSC 0.1063 0.0256 BSC 0.0157 16 4 4 − Notes 5 0.1102 − 0.1102 0.0197 − − − 3, 7 6 6 ECN: S-50794—Rev. B, 16-May-05 DWG: 5905 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. All angels are in degrees. 3. N is the total number of terminals. 4. The terminal #1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be either a molded or marked feature. The X and Y dimension will vary according to lead counts. 5. Dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from the terminal tip. 6. ND and NE refer to the number of terminals on the D and E side respectively. 7. Depopulation is possible in a symmetrical fashion. 8. Variation HHD is shown for illustration only. 9. Coplanarity applies to the exposed heat sink slug as well as the terminals. www.vishay.com 2 Document Number: 72802 16-May-05 Package Information Vishay Siliconix TSSOP: 16-LEAD DIMENSIONS IN MILLIMETERS Symbols Min Nom Max A - 1.10 1.20 A1 0.05 0.10 0.15 A2 - 1.00 1.05 0.38 B 0.22 0.28 C - 0.127 - D 4.90 5.00 5.10 E 6.10 6.40 6.70 E1 4.30 4.40 4.50 e - 0.65 - L 0.50 0.60 0.70 L1 0.90 1.00 1.10 y - - 0.10 θ1 0° 3° 6° ECN: S-61920-Rev. D, 23-Oct-06 DWG: 5624 Document Number: 74417 23-Oct-06 www.vishay.com 1 PAD Pattern www.vishay.com Vishay Siliconix RECOMMENDED MINIMUM PAD FOR TSSOP-16 0.193 (4.90) 0.171 0.014 0.026 0.012 (0.35) (0.65) (0.30) (4.35) (7.15) 0.281 0.055 (1.40) Recommended Minimum Pads Dimensions in inches (mm) Revision: 02-Sep-11 1 Document Number: 63550 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. © 2021 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED Revision: 01-Jan-2021 1 Document Number: 91000