SIP43101

SiP43101 Vishay Siliconix Dual Output Power Switch with Inverting Input FEATURES D D D D D D Two Output Power Switches Total Output Drive — 200 mA Continuous Pb-free Available 9-V to 35-V Supply Voltage Range Low Side or High Side Switch Configuration User Programmable Phasing of Output Switches Internal Output Over Voltage Clamp For Driving Inductive Loads D Current Limit Protection D Thermal Shutdown Protection D UVLO With User Programmable Time Delay APPLICATIONS D Optical Detectors for Factory Automation DESCRIPTION SiP43101 is a dual power switch IC which contains all control and power switching circuitry required to drive resistive and inductive loads in industrial applications. The output switches are NPN power transistors which can be configured as either high-side or low-side switches. These switches can operate from voltages as high as 35 V and have a continuous output current rating of 200 mA, combined or individually. Internal zener diodes are provided to clamp the power switch voltages to safe levels when driving inductive loads. The IN1 pin is a non-inverting input which controls the output of switch 1. A 2-input Exclusive OR gate input controls switch 2, allowing switch 2 to be controlled by either an inverting or non-inverting control signal. SiP43101 contains under voltage lockout, UVLO, a user definable turn on delay, current limit, short circuit protection, and thermal shutdown. The SiP43101 is available in both standard and lead (Pb)-free 16-pin TSSOP and PowerPAKr MLP-44 packages, which are specified over the industrial, D suffix (–40 to 85_C) tem– perature range. TYPICAL APPLICATION CIRCUIT +10 to 30 V 5V 100 nF SiP43101 1 kW R1 VCC FAULT IN1 IN2A IN2B CDEL R2 100 nF GND C1 E1 C2 E2 Load Load INPUT GND Both Switches Configured as Low-Side, Switch 2 Inverted With Respect to Switch 1, R1 +R2 Set Logic High Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 1 SiP43101 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V C1, E1, C2, E2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V C1-E1, C2-E2 (clamped by internal circuitry) . . . . . . . . . . . . . . . . . . . . . . 52 V Output Current Continuous for one Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Peak for one Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 A FAULT Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA FAULT Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V t0 VCC + 0.3 V IN1, IN2A, IN2B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V t0 VCC + 0.3 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C Currents are positive into, negative out of the specificed terminal. Notes a. Derate 11.1 mW/_C b. Derate 21.3 mW/_C c. Device mounted on JEDEC compliant two layer test board. d. Device mounted on JEDEC compliant four layer test board. Power Dissipation TSSOP-16a @ 85_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440 mW PowerPAK MLP44-16b @ 85_C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 850 mW Thermal Impedance (QJA) TSSOP-16c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90_C/W PowerPAK MLP44-16d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47_C/W Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 to 32 V Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 to 85_C SPECIFICATIONS Test Conditions Unless Specified Parameter Power Supply Supply Voltage Supply Current VCC ICC –40 to 85_C, Both Inputs Enabled 9 6 32 9 V mA Limits Mina Typb Maxa Unit Symbol VCC = 25 V,IN1, IN2 = 0 V, IN1, IN2, INV2 = 5 V CDEL = 10 nF, TA = TJ Logic Inputs (IN1, IN2A, IN2B) Digital Input High Level Digital Input Low Level Input Bias Current, Low Level Input Bias Current, High Level VIH VIL IIL IIH IN1, IN2A, IN2B = 0 V IN1, IN2A, IN2B = 5 V –0.40 0.02 3.5 1.5 V mA Switches 1&2 – High Side Configuration Rise Time (Off to On) Rise Tiem (On to Off) Saturation Voltage Current Limit Leakage Current Voltabe Clamp tr tf VSATHS ILIMHS ILHS VCLHS RLOAD = 250 W to GND, C1 , C2 = 25 V 250 to GND 25 RLOAD = 125 W to GND 125 to TA = 25 _C TA = –40 _C 1.1 5 52 300 300 1.3 1.5 V A mA V ns RLOAD = 0.25 W to GND, TA = 25 _C E1, E2 = GND, C1 , C2 = 25 V,IN1, IN2A, IN2B = 0 V Measure (VC1 – VE1) or (VC2 – VE2) Switches 1&2 – Low Side Configuration Rise Time (On to Off) Rise Tiem (Off to On) Saturation Voltage Current Limit Leakage Current Voltabe Clamp www.vishay.com tr tf VSATLS ILIMLS ILLS VCLLS RLOAD = 250 W to VCC, LOAD = 25 V to C1 , C2 250 to 25 to RLOAD = 125 W to VCC 125 to TA = 25 _C TA = –40 _C 1.1 5 52 400 350 1.3 1.5 V A mA V ns RLOAD = 0.25 W to VCC, TA = 25 _C E1, E2 = GND, C1 , C2 = 25 V,IN1, IN2A, IN2B = 0 V Measure (VC1 – VE1) or (VC2 – VE2) 2 Document Number: 72640 S-51493, Rev. D—15-Aug-05 SiP43101 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Specified Parameter Turn-On Delay CDEL Maximum Voltage CDEL Threshold ICDEL VDEL VDELTH ICDEL 4.7 4 2.5 V mA Limits Mina Typb Maxa Unit Symbol VCC = 25 V,IN1, IN2 = 0 V, IN1, IN2, INV2 = 5 V CDEL = 10 nF, TA = TJ FAULT Output VCESAT Conducting State (On) VSDON Load on FAULT v 10 mA 0.4 V Operating Frequency Switching Frequency fSW 25 kHz Under Voltage Lockout UVLO Threshold UVLO Hysteresis VUVLO VHYS 7.5 0.4 8 0.5 8.5 0.6 V Thermal Shutdown Thermal Shutdown Threshold Hysteresis T THYS 160 20 _C Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (–40_ to 85_C). b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 12 V unless otherwise noted. PIN CONFIGURATION TSSOP-16 1 2 3 4 5 6 7 8 Top View 16 15 14 13 12 11 10 9 C2 NC E2 NC NC E1 NC C1 VCC FAULT CDEL NC GND IN2B IN2A IN1 TSSOP 16 ORDERING INFORMATION Standard Part Number SiP43101DQ-T1 Lead (Pb)-Free Part Number SiP43101DQ-T1—E3 Temperature Range –40 to 85_C Marking 43101 PowerPAK MLP-44 C2 13 NC 14 VCC FAULT 15 16 E2 NC NC E1 12 11 10 9 1 2 3 4 CDEL GND NC IN2B PowerPAK MLP 44 ORDERING INFORMATION Standard Part Number SiP43101DLP-T1 Lead (Pb)-Free Part Number SiP43101DLP-T1–E3 Temperature Range –40 to 85_C Marking 43101 8 C1 7 NC 6 IN1 5 IN2A Bottom View Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 3 SiP43101 Vishay Siliconix PIN DESCRIPTION Pin Number TSSOP-16 1 2 3 4, 10, 12, 13, 15 5 6 7 8 9 11 14 16 MLP44-16 15 16 1 3, 7, 10, 11, 14 2 4 5 6 8 9 12 13 Name VCC FAULT CDEL NC GND IN2B IN2A IN1 C1 E1 E2 C2 Positive Supply Voltage Function Open collector output that is switched low on in the event of Short Circuit or Thermal Shut Down. Connection for the external capacitor controlling the turn on delay. No connection Ground Pin. Input to the Exclusive OR controlling power switch 2. Input to the Exclusive OR controlling power switch 2. Input controlling power switch 1. Collector of power switch 1. Emitter of power switch 1. Emitter of power switch 2. Collector of power switch 2. DETAILED PIN DESCRIPTION CDEL A capacitor connected to this pin is used to set the duration the turn on delay. The delay starts after the UVLO threshold has been reached. E1 This pin is the emitter of Switch 1. This pin is connected to the load in the High-Side Switch configuration, and is connected to Ground in the Low-Side configuration. E2 IN1 This pin controls the state of the output NPN switch 1. A Logic 0 holds the switch off while a Logic 1 turns the switch on. This pin is the emitter of switch 2. This pin is connected to the load in the High-Side switch configuration, and is connected to Ground in the Low-Side configuration. C1 IN2A, IN2B These pins are the inputs to the Exclusive OR gate that controls the state of the output NPN switch 2. This allows the use of either a non-inverting or an inverted signal to control the switch. Refer to the truth table for the logic function description. This pin is the collector of switch 1. This pin is connected to the VCC in the High-Side switch configuration, and is connected to the load in the Low-Side configuration. C2 This pin is the collector of switch 2. This pin is connected to the VCC in the High-Side switch configuration, and is connected to the load in the Low-Side configuration. FAULT This pin is an open collector output that is pulled to Ground in the event of a short circuit, an overcurrent, or a thermal shut down Document Number: 72640 S-51493, Rev. D—15-Aug-05 IN2A Low Low High High www.vishay.com IN2B Low High Low High SWITCH 2 Off On On Off 4 SiP43101 Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM VCC Reference C2 CDEL UVLO E2 Reset FAULT Control Logic C1 Short Citcuit Thermal Shut Down E1 IN2B IN2A IN1 GND DETAILED OPERATION Turn On Delay The turn on delay prohibits the output switches from being turned on for a period of time after VCC has passed through 8 V and the undervoltage condition no longer exists. The UVLO function keeps the external CDEL capacitor discharged until VCC is greater than 8 V. Subsequently, an internal 2.5-mA current source charges the capacitor from GND to 4.7 V. A comparator detects when the voltage on CDEL passes through 4 V and enables the output switches. The delay time is a function of the capacitor value and is defined as 1.6 ms/nF. An external switch can be connected across the capacitor to disable the output switches and reset the time delay. Short Circuit and Overcurrent indication When an overcurrent or short circuit condition occurs on either switch, the SiP43101 enters a hiccup current limiting mode. In this mode, the capacitor on CDEL is discharged down to 3 V, thus turning off the output switches, and then is charged up to 4 V by a 2.5-mA internal current source, thus turning the switches on again. If the overcurrent or short circuit condition remains this cycle will continue. The switches are enabled at a very low duty cycle, minimizing the power dissipation and protecting the switches from damage. The FAULT output will switch to GND, indicating that an overload condition or short circuit condition exists. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72640. Document Number: 72640 S-51493, Rev. D—15-Aug-05 www.vishay.com 5 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1