M74HC73

M74HC73 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR s s s s s s s HIGH SPEED : fMAX = 80MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 73 DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE M74HC73B1R M74HC73M1R T&R M74HC73RM13TR M74HC73TTR DESCRIPTION The M74HC73 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Depending on the logic level applied to J and K inputs, this device changes state on the negative going transition of clock input pulse (CK). The clear function is accomplished independently of the clock condition when the clear input (CLR) is taken low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 M74HC73 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 5 2, 6 12, 9 13, 8 14, 7, 3, 10 11 4 SYMBOL 1CK, 2CK NAME AND FUNCTION Clock Input Asynchronous Reset 1CLR, 2CLR Inputs 1Q, 2Q True Flip-Flop Outputs Complement Flip-Flop 1Q, 2Q Outputs 1J, 2J, 1K, Synchronous Inputs 2K Flip-Flop 1 and 2 GND Ground (0V) Vcc Positive Supply Voltage TRUTH TABLE INPUTS CLR L H H H H H X : Don’t Care OUTPUTS FUNCTION K X L H L H X CK X Q L Qn L H Qn Qn Q H Qn H L Qn Qn CLEAR NO CHANGE ------TOGGLE NO CHANGE J X L L H H X LOGIC DIAGRAM 2/11 M74HC73 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW °C °C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns 3/11 M74HC73 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 µA IO=-20 µA IO=-20 µA IO=-4.0 mA IO=-5.2 mA IO=20 µA IO=20 µA IO=20 µA IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 ± 0.1 2 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 ±1 20 Typ. Max. Value -40 to 85°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 ±1 40 µA µA V V Max. -55 to 125°C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH 4/11 M74HC73 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25°C Min. Typ. 30 8 7 42 14 12 54 18 15 15 60 80 18 6 6 21 7 6 30 8 6 Max. 75 15 13 125 25 21 145 29 25 4.8 24 28 75 15 13 75 15 13 75 15 13 0 0 0 75 15 13 95 19 16 95 19 16 95 19 16 0 0 0 95 19 16 Value -40 to 85°C Min. Max. 95 19 16 155 31 26 180 36 31 4 20 24 110 22 19 110 22 19 110 22 19 0 0 0 110 22 19 -55 to 125°C Min. Max. 110 22 19 190 38 32 220 44 37 ns Unit tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CK - Q) tPLH tPHL Propagation Delay Time (CLR - Q) fMAX Maximum Clock Frequency Minimum Pulse Width (CK) Minimum Pulse Width (CLR) Minimum Set-up Time Minimum Hold Time Minimum Removal Time ns ns 6 30 35 MHz tW(H) tW(L) tW(L) ns ns ts ns th ns tREM 25 7 6 ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 5.0 5.0 TA = 25°C Min. Typ. 5 35 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + I CC/2 (per FLIP/ FLOP) 5/11 M74HC73 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: MINIMUM REMOVAL TIME (f=1MHz; 50% duty cycle) 6/11 M74HC73 WAVEFORM 2 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) W AVEFORM 3 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle) 7/11 M74HC73 Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch P001A 8/11 M74HC73 SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8° (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45° (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13G 9/11 M74HC73 TSSOP14 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0° 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8° 0.75 0° 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8° 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 10/11 M74HC73 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11