HV57908PG-G

HV57908 64-Channel 8 MHz Serial-to-Parallel Converter with Push-Pull Outputs Features General Description • • • • • • • • The HV57908 is a low-voltage to high-voltage serial-to-parallel converter with 64 push-pull outputs. This device is designed as a driver for EL displays. It can also be used in any application requiring multiple-output high-voltage low-current sourcing-and-sinking capabilities, such as driving plasma panels, vacuum fluorescent displays and large matrix LCD displays. 5V CMOS Logic Up to 80V Output Voltage Low-power Level Shifting 8 MHz Data Rate Latched Data Outputs Forward and Reverse Shifting Options (DIR pin) Diode to VPP allows Efficient Power Recovery Outputs may be Hot Switched Applications • • • • • Display Driver Vacuum Fluorescent Display Driver Inkjet Driver 3D Printer Driver Microelectromechanical Systems Applications The device consists of a 64-bit Shift register, 64 latches and control logic to perform the polarity select and blanking of the outputs. HVOUT1 is connected to the first stage of the first Shift register through the polarity and blanking logic. Data is shifted through the Shift registers on the logic low-to-high transition of the clock. The DIR pin causes counter-clockwise shifting when connected to GND and clockwise shifting when connected to VDD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the Shift register, HVOUT64. The operation of the Shift register is not affected by the latch enable (LE), blanking (BL) and polarity (POL) inputs. Transfer of data from the Shift registers to the latches occurs when the LE input is high. The data in the latches is stored when LE is low. Package Type 80-lead PQFP (Top view) 80 1 See Table 2-1 for pin information.  2018 Microchip Technology Inc. DS20005877A-page 1 HV57908 Functional Block Diagram POL BL VPP LE DI/OA HVOUT1 CLK HVOUT2 DIR 64-bit Static Shift Register 64 Latches • • • 60 Additional Outputs • • • HVOUT63 HVOUT64 DI/OB  DS20005877A-page 2  2018 Microchip Technology Inc. HV57908 Typical Application Circuit  2018 Microchip Technology Inc. DS20005877A-page 3 HV57908 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Supply Voltage, VDD ............................................................................................................................... –0.5V to +7.5V Output Voltage, VPP ................................................................................................................................. –0.5V to +90V Logic Input Levels ............................................................................................................................ –0.3V to VDD+0.3V Ground Current (Note 1) ......................................................................................................................................... 1.5A Maximum Junction Temperature, TJ(MAX) ........................................................................................................... +125°C Storage Temperature, TS .................................................................................................................... –65°C to +150°C Continuous Total Power Dissipation: 80-lead PQFP (Note 2) ......................................................................................................................... 1200 mW † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Note 1: Limited by the total power dissipated in the package 2: For operations above 25°C ambient, derate linearly to the maximum operating temperature of 70°C at 20 mW/°C. RECOMMENDED OPERATING CONDITIONS Parameter Sym. Min. Typ. Max. Unit Logic Supply Voltage VDD 4.5 — 5.5 V Output Voltage VPP 8 — 80 V High-level Input Voltage VIH VDD–0.5 — — V Low-level Input Voltage VIL 0 — 0.5 V Clock Frequency per Register fCLK — — 8 MHz TA –40 — +85 °C Operating Ambient Temperature DS20005877A-page 4 Conditions  2018 Microchip Technology Inc. HV57908 DC ELECTRICAL CHARACTERISTICS Electrical Specifications: Over recommended operating conditions unless otherwise noted, TA = –40°C to +85°C. Parameter VDD Supply Current Quiescent VDD Supply Current Sym. Min. Typ. Max. Unit IDD — — 15 mA VDD = VDD maximum, fCLK = 8 MHz IDDQ — — 100 µA All VIN = VDD — — 100 µA Outputs high — — 100 µA Outputs low — — 1 µA VIH = VDD High-voltage Supply Current IPP High-level Logic Input Current IIH Low-level Logic Input Current High-level Output Low-level Output IIL HVOUT Data Out HVOUT Data Out High-voltage Clamp Diode Voltage VOH VOL VOC Conditions — — –1 µA VIL = 0V 65 — — V VPP = 80V, IO = –15 mA VDD–0.5 — — V IO = –100 µA — — 7 V VPP = 80V, IO = 12 mA — — 0.5 V IO = 100 µA — — 1 V IOC = 1 mA AC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = +85°C maximum. Logic signal inputs and data inputs have tr, tf ≤ 5 ns (10% and 90% points). Parameter Sym. Min. Typ. Max. fCLK — — 8 tWL, tWH 62 — — ns Data Set-up Time before Clock Rises tSU 10 — — ns Data Hold Time after Clock Rises tH 15 — — ns Time from Latch Enable to HVOUT tON, tOFF — — 500 ns Latch Enable Pulse Width tWLE 25 — — ns Delay Time Clock to Latch Enable Low to High tDLE 25 — — ns Latch Enable Set-up Time before Clock Rises tSLE 0 — — ns Delay Time Clock to Data Low to High tDLH — — 70 ns CL = 15 pF Delay Time Clock to Data High to Low tDHL — — 70 ns CL = 15 pF Clock Frequency Clock Width High or Low Note 1: Unit Conditions MHz Per register CL = 15 pF Note 1 tDLE is not required but is recommended to produce stable high-voltage outputs and minimize power dissipation and current spikes. tDLE allows the internal SR output to stabilize. TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Operating Ambient Temperature TA –40 — +85 °C Maximum Junction Temperature TJ(MAX) — — +125 °C TS –65 — +150 °C JA — 37 — °C/W Conditions TEMPERATURE RANGE Storage Temperature PACKAGE THERMAL RESISTANCE 80-lead PQFP  2018 Microchip Technology Inc. DS20005877A-page 5 HV57908 Timing Waveforms VIH DATA INPUT 50% Data Valid 50% VIL CLK 50% tf tH tSU VIH 90% 50% 50% tWL tr 10% 10% 90% 50% VIL tWH VOH 50% VOL DATA OUT tDLH VOH 50% VOL tDHL VIH 50% 50% LE VIL tWLE tDLE HVOUT w/ S/R LOW tSLE 90% 10% VOH VOL tOFF HVOUT w/ S/R HIGH 10% 90% VOH VOL tON DS20005877A-page 6  2018 Microchip Technology Inc. HV57908 2.0 PIN DESCRIPTION The details on the pins of HV57908 are listed on Table 2-1. Refer to Package Type for the location of pins. TABLE 2-1: Pin Number PIN FUNCTION TABLE Pin Name Description 1 HVOUT24/41 High-voltage output 2 HVOUT23/42 High-voltage output 3 HVOUT22/43 High-voltage output 4 HVOUT21/44 High-voltage output 5 HVOUT20/45 High-voltage output 6 HVOUT19/46 High-voltage output 7 HVOUT18/47 High-voltage output 8 HVOUT17/48 High-voltage output 9 HVOUT16/49 High-voltage output 10 HVOUT15/50 High-voltage output 11 HVOUT14/51 High-voltage output 12 HVOUT13/52 High-voltage output 13 HVOUT12/53 High-voltage output 14 HVOUT11/54 15 HVOUT10/55 High-voltage output 16 HVOUT9/56 High-voltage output 17 HVOUT8/57 High-voltage output 18 HVOUT7/58 High-voltage output 19 HVOUT6/59 High-voltage output 20 HVOUT5/60 High-voltage output 21 HVOUT4/61 High-voltage output 22 HVOUT3/62 High-voltage output 23 HVOUT2/63 High-voltage output 24 HVOUT1/64 High-voltage output 25 DI/OA 26 NC No connection 27 NC No connection 28 NC No connection 29 LE Latch enable pin 30 CLK 31 BL 32 VDD Low-voltage supply voltage 33 DIR Direction pin 34 GND Ground Note: High-voltage output Data Input/Output A pin Clock pin Blanking pin Pin designation for DIR = H/L  Examples: For DIR = H, pin 41 is HVOUT64.  For DIR = L, pin 41 is HVOUT1.  2018 Microchip Technology Inc. DS20005877A-page 7 HV57908 TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin Number Pin Name Description 35 POL Polarity pin 36 NC No connection 37 NC No connection 38 NC No connection 39 DI/OB 40 VPP 41 HVOUT64/1 High-voltage output 42 HVOUT63/2 High-voltage output 43 HVOUT62/3 High-voltage output 44 HVOUT61/4 High-voltage output 45 HVOUT60/5 High-voltage output 46 HVOUT59/6 High-voltage output 47 HVOUT58/7 High-voltage output 48 HVOUT57/8 High-voltage output 49 HVOUT56/9 High-voltage output 50 HVOUT55/10 High-voltage output Data Input/Output B pin High-voltage supply voltage 51 HVOUT54/11 52 HVOUT53/12 High-voltage output 53 HVOUT52/13 High-voltage output 54 HVOUT51/14 High-voltage output 55 HVOUT50/15 High-voltage output 56 HVOUT49/16 High-voltage output 57 HVOUT48/17 High-voltage output 58 HVOUT47/18 High-voltage output 59 HVOUT46/19 High-voltage output 60 HVOUT45/20 High-voltage output 61 HVOUT44/21 High-voltage output 62 HVOUT43/22 High-voltage output 63 HVOUT42/23 High-voltage output 64 HVOUT41/24 High-voltage output 65 HVOUT40/25 High-voltage output 66 HVOUT39/26 High-voltage output 67 HVOUT38/27 High-voltage output 68 HVOUT37/28 High-voltage output 69 HVOUT36/29 High-voltage output 70 HVOUT35/30 High-voltage output 71 HVOUT34/31 High-voltage output 72 HVOUT33/32 High-voltage output 73 HVOUT32/33 High-voltage output Note: High-voltage output Pin designation for DIR = H/L  Examples: For DIR = H, pin 41 is HVOUT64.  For DIR = L, pin 41 is HVOUT1. DS20005877A-page 8  2018 Microchip Technology Inc. HV57908 TABLE 2-1: Pin Number PIN FUNCTION TABLE (CONTINUED) Pin Name 74 HVOUT31/34 High-voltage output 75 HVOUT30/35 High-voltage output 76 HVOUT29/36 High-voltage output 77 HVOUT28/37 High-voltage output 78 HVOUT27/38 High-voltage output 79 HVOUT26/39 High-voltage output 80 HVOUT25/40 High-voltage output Note: Description Pin designation for DIR = H/L  Examples: For DIR = H, pin 41 is HVOUT64.  For DIR = L, pin 41 is HVOUT1.  2018 Microchip Technology Inc. DS20005877A-page 9 HV57908 3.0 FUNCTIONAL DESCRIPTION Follow the steps in Table 3-1 to power up and power down the HV57908. TABLE 3-1: POWER-UP AND POWER-DOWN SEQUENCE Power-up Step Power-down Description Step 1 Connect ground. 1 2 2 Apply VDD. 3 Set all inputs (Data, CLK, Enable, etc.) to a known state. 3 4 Apply VPP. (Note 1) 4 Note 1: The VPP should not drop below VDD or float during operation. TABLE 3-2: Description Remove VPP. (Note 1) Remove all inputs. Remove VDD. Disconnect ground. TRUTH FUNCTION TABLE Inputs Function Data CLK LE Outputs BL POL DIR Shift Register High-voltage Output Data Out All O/P High X X X L L X — H — All O/P Low X X X L H X — L — O/P Normal X X X H H X — No inversion — O/P Inverted X X X H L X — Inversion — L ↑ H H H X L L — Data Falls through Latches (Latches Transparent) H ↑ H H H X H H — L ↑ H H L X L H — H ↑ H H L X H L — X X L H H X * Stored data — X X L H L X * Inversion of stored data — DI/OA ↑ X X X H QN→QN+1 — DI/OB DI/OB ↑ X X X L QN→QN–1 — DI/OA Data Stored/Latches Loaded I/O Relation Note: H = High-logic level L = Low-logic level X = Irrelevant ↑ = Low-to-high transition  * = Dependent on the previous stage’s state VDD VPP VDD DATA OUTPUT INPUT DATA GND GND Logic Inputs FIGURE 3-1: DS20005877A-page 10 HVOUT GND Logic Data Output High Voltage Outputs Input and Output Equivalent Circuits.  2018 Microchip Technology Inc. HV57908 DIR = H; CW (HVOUT1 → HVOUT64) DIR = L; CCW (HVOUT64 → HVOUT1) HVOUT32 • DIR = H • HVOUT33 • DIR = L • SR • • • • • • HVOUT2 HVOUT63 HVOUT64 HVOUT1 Pin FIGURE 3-2: 25 39 D I/OA D I/OB Shift Register Operation.  2018 Microchip Technology Inc. DS20005877A-page 11 HV57908 4.0 PACKAGE MARKING INFORMATION 4.1 Packaging Information 80-lead PQFP Example XXXXXXXXX YYWWNNN HV57908PG e3 1838852 e3 Legend: XX...X Y YY WW NNN e3 * Note: DS20005877A-page 12 Product Code or Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo.  2018 Microchip Technology Inc. HV57908 80-Lead PQFP Package Outline (PG) 20.00x14.00mm body, 3.40mm height (max), 0.80mm pitch, 3.90mm footprint D D1 E Note 1 (Index Area D1/4 x E1/4) E1 80 ș 1 e b Top View View B Gauge Plane L2 A A2 L L1 Seating Plane A1 Side View Seating Plane ș View B Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging. Note: 1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU a printed indicator. Symbol Dimension (mm) MIN NOM MAX A A1 2.80* 0.25 3.40 - A2 b D D1 E E1 e 2.55 0.30 23.65* 19.80* 17.65* 13.80* 2.80 - 23.90 20.00 17.90 14.00 0.50* 3.05 0.45 24.15* 20.20* 18.15* 14.20* L L1 L2 0.73 0.80 BSC 0.88 1.03 1.95 REF 0.25 BSC ș ș 0O 5O 3.5O - 7 O 16O JEDEC Registration MO-112, Variation CB-1, Issue B, Sept.1995. 7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ Drawings not to scale. S D # DSPD 80PQFPPG V i C041309  2018 Microchip Technology Inc. DS20005877A-page 13 HV57908 NOTES: DS20005877A-page 14  2018 Microchip Technology Inc. HV57908 APPENDIX A: REVISION HISTORY Revision A (January 2018) • Converted Supertex Doc # DSFP-HV57908 to Microchip DS20005877A • Removed “HVCMOS® Technology” from the Features section • Changed the package marking format • Made minor changes throughout the document  2018 Microchip Technology Inc. DS20005877A-page 15 HV57908 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART NO. Device XX - Package Options X - Environmental X Media Type Device: HV57908 = 64-Channel 8 MHz Serial-to-Parallel Converter with Push-Pull Outputs Package: PG = 80-lead PQFP Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Type: (blank) = 66/Tray for a PG Package DS20005877A-page 16 Example:  a) HV57908PG-G: 64-Channel 8 MHz Serial-toParallel Converter with PushPull Outputs, 80-lead PQFP, 66/Tray  2018 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. 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QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2018, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-2573-1 == ISO/TS 16949 ==  2018 Microchip Technology Inc. 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