NVD5C464NT4G

MOSFET – Power, Single N-Channel 40 V, 5.8 mW, 59 A NVD5C464N Features • • • • Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(on) ID 40 V 5.8 mW @ 10 V 59 A MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS "20 V ID 59 A Continuous Drain Current RqJC (Notes 1 & 3) Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2 & 3) TC = 25°C Steady State TC = 100°C TC = 25°C Pulsed Drain Current PD TC = 100°C TA = 25°C Power Dissipation RqJA (Notes 1 & 2) 41 Steady State ID PD W 3 DPAK CASE 369C STYLE 2 2.1 431 A TJ, Tstg −55 to 175 °C IS 44 A Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, IL(pk) = 5 A) EAS 136 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Source Current (Body Diode) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter 4 1 2 3.0 IDM Operating Junction and Storage Temperature S N−CHANNEL MOSFET A 16 13 TA = 100°C TA = 25°C, tp = 10 ms G 20 TA = 100°C TA = 25°C W 40 D Symbol Value Unit Junction−to−Case (Drain) (Note 1) RqJC 3.76 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 48 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. MARKING DIAGRAM & PIN ASSIGNMENT 4 Drain AYWW 5C 464NG Parameter 2 1 Drain 3 Gate Source A = Assembly Location Y = Year WW = Work Week 5C464N= Device Code G = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2015 May, 2021 − Rev. 2 1 Publication Order Number: NVD5C464N/D NVD5C464N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 22 VGS = 0 V, VDS = 40 V mV/°C TJ = 25°C 10 TJ = 125°C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 40 mA mA 100 nA 4.0 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance Forward Transconductance VGS(TH)/TJ 2.0 6.8 mV/°C RDS(on) VGS = 10 V, ID = 30 A 4.8 5.8 gFS VDS = 3 V, ID = 30 A 55 S 1200 pF mW CHARGES, CAPACITANCES AND GATE RESISTANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Ciss Coss Crss VGS = 0 V, f = 1.0 MHz, VDS = 25 V 580 32 nC Total Gate Charge QG(TOT) 20 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Plateau Voltage VGP 5.0 V td(on) 9 ns 3.7 VGS = 10 V, VDS = 32 V, ID = 30 A 6.2 4.0 SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(off) VGS = 10 V, VDS = 32 V, ID = 30 A, RG = 2.5 W tf 40 18 5 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time tRR Charge Time Discharge Time Reverse Recovery Charge ta tb VGS = 0 V, IS = 30 A TJ = 25°C 0.9 TJ = 125°C 0.8 32 VGS = 0 V, dIs/dt = 100 A/ms, IS = 30 A QRR www.onsemi.com 2 V ns 16 17 20 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. 1.2 nC NVD5C464N TYPICAL CHARACTERISTICS VDS = 3 V 60 6.0 V 40 5.2 V 5.0 V 4.8 V 4.6 V 4.4 V 20 0 0 0.5 1.0 1.5 2.0 60 40 TJ = 25°C 20 0 3.0 2.5 TJ = 125°C 2 5 6 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 12 8 4 0 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 16 TJ = 25°C 12 VGS = 10 V 8 4 0 5 10 15 20 25 30 35 40 45 50 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 100000 2.0 VGS = 10 V ID = 30 A TJ = 175°C 10000 IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE TJ = −55°C 4 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C ID = 30 A 1.8 3 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 16 3 80 ID, DRAIN CURRENT (A) 80 . RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 100 7.0 V VGS = 8 V to 10 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 100 1.6 1.4 1.2 1.0 0.8 TJ = 150°C 1000 TJ = 125°C 100 TJ = 85°C 10 TJ = 25°C 1 0.1 0.6 −50 −25 0 25 50 75 100 125 150 175 0.01 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVD5C464N TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 10000 CISS 1000 COSS 100 CRSS 10 VGS = 0 V TJ = 25°C f = 1 MHz 1 0 5 10 15 20 25 30 35 40 QGD QGS 5 4 3 VDS = 32 V TJ = 25°C ID = 30 A 2 1 0 0 2 6 4 8 10 12 14 18 16 Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge 20 100 IS, SOURCE CURRENT (A) VGS = 0 V 100 t, TIME (ns) 7 6 QG, TOTAL GATE CHARGE (nC) VGS = 10 V VDS = 32 V ID = 17 A tr td(off) td(on) 10 tf 1 10 10 1 0.1 100 TJ = 125°C 0.3 0.4 TJ = 25°C 0.5 0.6 TJ = −55°C 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 1000 TC = 25°C VGS ≤ 10 V Single Pulse 100 TJ (initial) = 25°C IPEAK, (A) ID, DRAIN CURRENT (A) 9 8 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 10 10 10 ms 1 0.1 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 10 TJ (initial) = 100°C 0.5 ms 1 ms 10 ms 1 100 1000 0.00001 0.0001 0.001 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 0.01 NVD5C464N TYPICAL CHARACTERISTICS 10 R(t) (°C/W) 50% Duty Cycle 1 20% 10% 5% 2% 0.1 1% Single Pulse 0.01 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics ORDERING INFORMATION Order Number NVD5C464NT4G Package Shipping† DPAK (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F 4 1 2 DATE 21 JUL 2015 3 SCALE 1:1 A E b3 C A B c2 4 L3 Z D 1 L4 2 3 NOTE 7 b2 e c SIDE VIEW b 0.005 (0.13) TOP VIEW H DETAIL A M BOTTOM VIEW C Z H L2 GAUGE PLANE C L L1 DETAIL A Z SEATING PLANE BOTTOM VIEW A1 ALTERNATE CONSTRUCTIONS ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 8: PIN 1. N/C 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 9: STYLE 10: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. ANODE 3. RESISTOR ADJUST 3. CATHODE 4. CATHODE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW AYWW XXX XXXXXG IC Discrete = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 6.17 0.243 SCALE 3:1 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z XXXXXX A L Y WW G 3.00 0.118 1.60 0.063 STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON10527D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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